From patchwork Wed Oct 22 13:34:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 5132411 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4D1FDC11AC for ; Wed, 22 Oct 2014 13:40:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 57ED02017E for ; Wed, 22 Oct 2014 13:40:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5BF2B20127 for ; Wed, 22 Oct 2014 13:39:59 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xgw6R-0005UZ-T6; Wed, 22 Oct 2014 13:37:27 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xgw64-0005Ka-LJ for linux-arm-kernel@lists.infradead.org; Wed, 22 Oct 2014 13:37:06 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id BD4494FF7; Wed, 22 Oct 2014 15:36:46 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from arch.hh.imgtec.org (unknown [190.2.108.156]) by mail.free-electrons.com (Postfix) with ESMTPSA id 877224FC3; Wed, 22 Oct 2014 15:36:42 +0200 (CEST) From: Ezequiel Garcia To: Jason Cooper , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck Subject: [PATCH 3/4] clocksource: armada-370-xp: Use the reference clock on A375 SoC Date: Wed, 22 Oct 2014 10:34:43 -0300 Message-Id: <1413984884-20273-4-git-send-email-ezequiel.garcia@free-electrons.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1413984884-20273-1-git-send-email-ezequiel.garcia@free-electrons.com> References: <1413984884-20273-1-git-send-email-ezequiel.garcia@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141022_063705_012250_9E44E32A X-CRM114-Status: GOOD ( 12.80 ) X-Spam-Score: -0.5 (/) Cc: Lior Amsalem , Thomas Petazzoni , linux-watchdog@vger.kernel.org, Tawfik Bayouk , Nadav Haklai , Ezequiel Garcia , Gregory Clement , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The 25 MHz reference clock has better stability so its use is preferred over the core clock. This commit takes advantage of the already introduced Armada 375 devicetree compatible string and adds a new timer initialization. If available, the timer will use the reference clock (named as 'fixed'). Otherwise, it falls back to the previous behavior. Signed-off-by: Ezequiel Garcia --- .../bindings/timer/marvell,armada-370-xp-timer.txt | 9 +++++-- drivers/clocksource/time-armada-370-xp.c | 28 ++++++++++++++++++++++ 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt index f455182..5ef42bf 100644 --- a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt +++ b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt @@ -2,8 +2,10 @@ Marvell Armada 370 and Armada XP Timers --------------------------------------- Required properties: -- compatible: Should be either "marvell,armada-370-timer" or - "marvell,armada-xp-timer" as appropriate. +- compatible: Should be one of the following + "marvell,armada-370-timer", + "marvell,armada-375-timer", + "marvell,armada-xp-timer". - interrupts: Should contain the list of Global Timer interrupts and then local timer interrupts - reg: Should contain location and length for timers register. First @@ -13,6 +15,9 @@ Required properties: Clocks required for compatible = "marvell,armada-370-timer": - clocks : Must contain a single entry describing the clock input +Clocks required for compatible = "marvell,armada-375-timer": +- clocks : Must contain a "fixed" name clock entry + Clocks required for compatible = "marvell,armada-xp-timer": - clocks : Must contain an entry for each entry in clock-names. - clock-names : Must include the following entries: diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c index d8555f9..3a0704b 100644 --- a/drivers/clocksource/time-armada-370-xp.c +++ b/drivers/clocksource/time-armada-370-xp.c @@ -301,6 +301,34 @@ static void __init armada_xp_timer_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer", armada_xp_timer_init); +static void __init armada_375_timer_init(struct device_node *np) +{ + struct clk *clk; + + clk = of_clk_get_by_name(np, "fixed"); + if (!IS_ERR(clk)) { + clk_prepare_enable(clk); + timer_clk = clk_get_rate(clk); + } else { + + /* + * This fallback is required in order to retain proper + * devicetree backwards compatibility. + */ + clk = of_clk_get(np, 0); + + /* Must have at least a clock */ + BUG_ON(IS_ERR(clk)); + clk_prepare_enable(clk); + timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; + timer25Mhz = false; + } + + armada_370_xp_timer_common_init(np); +} +CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer", + armada_375_timer_init); + static void __init armada_370_timer_init(struct device_node *np) { struct clk *clk = of_clk_get(np, 0);