From patchwork Thu Nov 13 11:00:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 5295491 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CC545C11AC for ; Thu, 13 Nov 2014 11:07:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7E95720172 for ; Thu, 13 Nov 2014 11:07:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 374A920131 for ; Thu, 13 Nov 2014 11:07:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XosDE-0001J5-8R; Thu, 13 Nov 2014 11:05:16 +0000 Received: from mail-wi0-f170.google.com ([209.85.212.170]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xos9a-0005Bo-Gn for linux-arm-kernel@lists.infradead.org; Thu, 13 Nov 2014 11:01:32 +0000 Received: by mail-wi0-f170.google.com with SMTP id r20so1464276wiv.5 for ; Thu, 13 Nov 2014 03:01:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/PHLnWqywPssLEJYJwcNQC+CpCdmcUBb708gTaepGXw=; b=Lv7keg3kUTUXSrbr6tuXHFYGEOA/+fOCmS5F27qUTXpRWlJ4LOobWPQckJ5wRmb5Lm KOkAZVKk9SGoRPrED+IUyT1P+ASuW3Nz1F5eoq4rr+CJcD03rEsPyW0w+muA+NCtnWPW BFUXEVYA8a1CsiJfWryEFc4/a7J71wlAehqBs1SyzSVgtMOxzr2ZYTLzjFznajgPL5C2 K6AK8KGoyQTubOWHl6kK8LesIwQbuTCphN1X7YKBO4g6lzdFQjMqM6PvTNBJqJphuHt9 dwwzZBONG2t+4x2yjd5rUUJJ4iJ2ePGg45QvAr/HQsD14rMF3dRQ/GZGlEKUZmiSO4wT h7rg== X-Gm-Message-State: ALoCoQkf0ZgqXYc4B/IbYR0rihqAJzrfuFSS2IwBVyMG6EODyUNr6Cgotl/rTPuqGqvHsqYmuaRr X-Received: by 10.180.84.167 with SMTP id a7mr2658379wiz.39.1415876468332; Thu, 13 Nov 2014 03:01:08 -0800 (PST) Received: from localhost.localdomain (cpc14-aztw22-2-0-cust189.18-1.cable.virginm.net. [82.45.1.190]) by mx.google.com with ESMTPSA id p3sm35037554wjf.49.2014.11.13.03.01.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Nov 2014 03:01:07 -0800 (PST) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maxime.coquelin@st.com, srinivas.kandagatla@gmail.com, patrice.chotard@st.com, arnd@arndb.de Subject: [PATCH v2 11/14] ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support. Date: Thu, 13 Nov 2014 11:00:14 +0000 Message-Id: <1415876417-28728-12-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415876417-28728-1-git-send-email-peter.griffin@linaro.org> References: <1415876417-28728-1-git-send-email-peter.griffin@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141113_030131_070205_20FEEA3A X-CRM114-Status: GOOD ( 12.47 ) X-Spam-Score: -0.7 (/) Cc: peter.griffin@linaro.org, devicetree@vger.kernel.org, lee.jones@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU part of the stih407 family. It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet. Signed-off-by: Peter Griffin --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stih410-b2120.dts | 29 +++ arch/arm/boot/dts/stih410-clock.dtsi | 338 +++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stih410.dtsi | 14 ++ 4 files changed, 382 insertions(+) create mode 100644 arch/arm/boot/dts/stih410-b2120.dts create mode 100644 arch/arm/boot/dts/stih410-clock.dtsi create mode 100644 arch/arm/boot/dts/stih410.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 38c89ca..04cf4a4 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -409,6 +409,7 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ + stih410-b2120.dtb \ stih415-b2000.dtb \ stih415-b2020.dtb \ stih416-b2000.dtb \ diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts new file mode 100644 index 0000000..972c17a --- /dev/null +++ b/arch/arm/boot/dts/stih410-b2120.dts @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2014 STMicroelectronics (R&D) Limited. + * Author: Peter Griffin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; +#include "stih410.dtsi" +#include "stihxxx-b2120.dtsi" +/ { + model = "STiH410 B2120"; + compatible = "st,stih410-b2120", "st,stih410"; + + chosen { + bootargs = "console=ttyAS0,115200"; + linux,stdout-path = &sbc_serial0; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; + + aliases { + ttyAS0 = &sbc_serial0; + }; +}; diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi new file mode 100644 index 0000000..6b5803a --- /dev/null +++ b/arch/arm/boot/dts/stih410-clock.dtsi @@ -0,0 +1,338 @@ +/* + * Copyright (C) 2014 STMicroelectronics R&D Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +/ { + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + compatible = "st,stih410-clk", "simple-bus"; + + /* + * Fixed 30MHz oscillator inputs to SoC + */ + clk_sysin: clk-sysin { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + clock-output-names = "CLK_SYSIN"; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; + + /* + * A9 PLL. + */ + clockgen-a9@92b0000 { + compatible = "st,clkgen-c32"; + reg = <0x92b0000 0xffff>; + + clockgen_a9_pll: clockgen-a9-pll { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clockgen-a9-pll-odf"; + }; + }; + + /* + * ARM CPU related clocks. + */ + clk_m_a9: clk-m-a9@92b0000 { + #clock-cells = <0>; + compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; + reg = <0x92b0000 0x10000>; + + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_s_c0_flexgen 13>, + <&clk_m_a9_ext2f_div2>; + }; + + /* + * ARM Peripheral clock for timers + */ + clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + + clocks = <&clk_s_c0_flexgen 13>; + + clock-output-names = "clk-m-a9-ext2f-div2"; + + clock-div = <2>; + clock-mult = <1>; + }; + + /* + * Bootloader initialized system infrastructure clock for + * serial devices. + */ + clk_ext2f_a9: clockgen-c0@13 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + clock-output-names = "clk-s-icn-reg-0"; + }; + + clockgen-a@090ff000 { + compatible = "st,clkgen-c32"; + reg = <0x90ff000 0x1000>; + + clk_s_a0_pll: clk-s-a0-pll { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a0-pll-ofd-0"; + }; + + clk_s_a0_flexgen: clk-s-a0-flexgen { + compatible = "st,flexgen"; + + #clock-cells = <1>; + + clocks = <&clk_s_a0_pll 0>, + <&clk_sysin>; + + clock-output-names = "clk-ic-lmi0", + "clk-ic-lmi1"; + }; + }; + + clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-C", "st,quadfs"; + reg = <0x9103000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-c0-fs0-ch0", + "clk-s-c0-fs0-ch1", + "clk-s-c0-fs0-ch2", + "clk-s-c0-fs0-ch3"; + }; + + clk_s_c0: clockgen-c@09103000 { + compatible = "st,clkgen-c32"; + reg = <0x9103000 0x1000>; + + clk_s_c0_pll0: clk-s-c0-pll0 { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-c0-pll0-odf-0"; + }; + + clk_s_c0_pll1: clk-s-c0-pll1 { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-c0-pll1-odf-0"; + }; + + clk_s_c0_flexgen: clk-s-c0-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_c0_pll0 0>, + <&clk_s_c0_pll1 0>, + <&clk_s_c0_quadfs 0>, + <&clk_s_c0_quadfs 1>, + <&clk_s_c0_quadfs 2>, + <&clk_s_c0_quadfs 3>, + <&clk_sysin>; + + clock-output-names = "clk-icn-gpu", + "clk-fdma", + "clk-nand", + "clk-hva", + "clk-proc-stfe", + "clk-proc-tp", + "clk-rx-icn-dmu", + "clk-rx-icn-hva", + "clk-icn-cpu", + "clk-tx-icn-dmu", + "clk-mmc-0", + "clk-mmc-1", + "clk-jpegdec", + "clk-ext2fa9", + "clk-ic-bdisp-0", + "clk-ic-bdisp-1", + "clk-pp-dmu", + "clk-vid-dmu", + "clk-dss-lpc", + "clk-st231-aud-0", + "clk-st231-gp-1", + "clk-st231-dmu", + "clk-icn-lmi", + "clk-tx-icn-disp-1", + "clk-icn-sbc", + "clk-stfe-frc2", + "clk-eth-phy", + "clk-eth-ref-phyclk", + "clk-flash-promip", + "clk-main-disp", + "clk-aux-disp", + "clk-compo-dvp", + "clk-tx-icn-hades", + "clk-rx-icn-hades", + "clk-icn-reg-16", + "clk-pp-hades", + "clk-clust-hades", + "clk-hwpe-hades", + "clk-fc-hades"; + }; + }; + + clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-D", "st,quadfs"; + reg = <0x9104000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-d0-fs0-ch0", + "clk-s-d0-fs0-ch1", + "clk-s-d0-fs0-ch2", + "clk-s-d0-fs0-ch3"; + }; + + clockgen-d0@09104000 { + compatible = "st,clkgen-c32"; + reg = <0x9104000 0x1000>; + + clk_s_d0_flexgen: clk-s-d0-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_d0_quadfs 0>, + <&clk_s_d0_quadfs 1>, + <&clk_s_d0_quadfs 2>, + <&clk_s_d0_quadfs 3>, + <&clk_sysin>; + + clock-output-names = "clk-pcm-0", + "clk-pcm-1", + "clk-pcm-2", + "clk-spdiff", + "clk-pcmr10-master", + "clk-usb2-phy"; + }; + }; + + clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-D", "st,quadfs"; + reg = <0x9106000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-d2-fs0-ch0", + "clk-s-d2-fs0-ch1", + "clk-s-d2-fs0-ch2", + "clk-s-d2-fs0-ch3"; + }; + + clk_tmdsout_hdmi: clk-tmdsout-hdmi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + + clockgen-d2@x9106000 { + compatible = "st,clkgen-c32"; + reg = <0x9106000 0x1000>; + + clk_s_d2_flexgen: clk-s-d2-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>, + <&clk_s_d2_quadfs 2>, + <&clk_s_d2_quadfs 3>, + <&clk_sysin>, + <&clk_sysin>, + <&clk_tmdsout_hdmi>; + + clock-output-names = "clk-pix-main-disp", + "clk-pix-pip", + "clk-pix-gdp1", + "clk-pix-gdp2", + "clk-pix-gdp3", + "clk-pix-gdp4", + "clk-pix-aux-disp", + "clk-denc", + "clk-pix-hddac", + "clk-hddac", + "clk-sddac", + "clk-pix-dvo", + "clk-dvo", + "clk-pix-hdmi", + "clk-tmds-hdmi", + "clk-ref-hdmiphy"; + }; + }; + + clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-D", "st,quadfs"; + reg = <0x9107000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-d3-fs0-ch0", + "clk-s-d3-fs0-ch1", + "clk-s-d3-fs0-ch2", + "clk-s-d3-fs0-ch3"; + }; + + clockgen-d3@9107000 { + compatible = "st,clkgen-c32"; + reg = <0x9107000 0x1000>; + + clk_s_d3_flexgen: clk-s-d3-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_d3_quadfs 0>, + <&clk_s_d3_quadfs 1>, + <&clk_s_d3_quadfs 2>, + <&clk_s_d3_quadfs 3>, + <&clk_sysin>; + + clock-output-names = "clk-stfe-frc1", + "clk-tsout-0", + "clk-tsout-1", + "clk-mchi", + "clk-vsens-compo", + "clk-frc1-remote", + "clk-lpc-0", + "clk-lpc-1"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi new file mode 100644 index 0000000..c05627e --- /dev/null +++ b/arch/arm/boot/dts/stih410.dtsi @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Peter Griffin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "stih410-clock.dtsi" +#include "stih407-family.dtsi" +#include "stih410-pinctrl.dtsi" +/ { + +};