From patchwork Wed Nov 19 22:51:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 5344591 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 75D329F1E1 for ; Wed, 19 Nov 2014 22:54:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8EA762017E for ; Wed, 19 Nov 2014 22:54:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D86820176 for ; Wed, 19 Nov 2014 22:54:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XrE6l-0002rC-RU; Wed, 19 Nov 2014 22:52:19 +0000 Received: from mail-ie0-x232.google.com ([2607:f8b0:4001:c03::232]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XrE6X-0002iS-TU for linux-arm-kernel@lists.infradead.org; Wed, 19 Nov 2014 22:52:06 +0000 Received: by mail-ie0-f178.google.com with SMTP id tp5so1616651ieb.37 for ; Wed, 19 Nov 2014 14:51:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cGqbbN8F/kjTo5whMon/0wucAM5z7NvRebwVjJq2pAo=; b=TwX5cOPBEwLNLJGTj2ZesvFq49vJqLu/XAAjDF98QpF/jvDIlrOVMqSLQg1oKfZr7I rHPEZ2tjkrcGZGMZKqzrEwvrBMsIr2gtEJNdk1/W790KPYulavZ9+kVn+XqpE+6PnqxT KM8feq4Qy2mihvZsvgMXfjo+fsRiwSm4sfkqM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cGqbbN8F/kjTo5whMon/0wucAM5z7NvRebwVjJq2pAo=; b=iUnBHn/soGTuKtYyFn2AG5V1KJO1mo15BUh0epK96fJwOKraa36jPQxX1jwQOq1zrk wz2iF0EH93mcF7Ld443sFt+8o+NpvJWSDZU0VtjT4VGTAeRDVYsmNMCKfg44mD1kdqfp uW2Q/oWrAeJeDYFrxl+ZCnlmAlUuwBFXE+cphYeTf+YrxefhC2k25/8ua4bNhxGit+jl BpYIZ6FlJ14BF22Te83U6dl/Vmu0O/FK0xsQYCzWfyqhKQj3vUOCGmZJkIaWXFxlyDVA IOC4l841LChX4CTfrEY+sjK+VutgvFMHD8i0ZuqzPl9XIyavNT/5jIJGyLdI+l4S43au B4Gg== X-Gm-Message-State: ALoCoQneld6sm5UhOl2smAjp+WmKxay9XoGltJF5Ii8LGMs94G8wZsQTRZQ/Uk1As4+nS9NoMysE X-Received: by 10.43.65.145 with SMTP id xm17mr5085133icb.2.1416437504918; Wed, 19 Nov 2014 14:51:44 -0800 (PST) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by mx.google.com with ESMTPSA id o2sm1557232igj.19.2014.11.19.14.51.43 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Nov 2014 14:51:44 -0800 (PST) From: Doug Anderson To: Heiko Stuebner , Linus Walleij Subject: [PATCH v2 1/2] pinctrl: rockchip: Handle wakeup pins Date: Wed, 19 Nov 2014 14:51:32 -0800 Message-Id: <1416437493-25588-2-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1416437493-25588-1-git-send-email-dianders@chromium.org> References: <1416437493-25588-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141119_145205_985593_BB07F282 X-CRM114-Status: GOOD ( 14.16 ) X-Spam-Score: -0.8 (/) Cc: linux-gpio@vger.kernel.org, Dmitry Torokhov , Doug Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Chris Zhong , Sonny Rao , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_LOW, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The rockchip pinctrl driver was using irq_gc_set_wake() as its implementation of irq_set_wake() but was totally ignoring everything that irq_gc_set_wake() did (which is to upkeep gc->wake_active). Let's fix that by setting gc->wake_active as GPIO_INTEN at suspend time and restoring GPIO_INTEN at resume time. NOTE a few quirks when thinking about this patch: - Rockchip pinctrl hardware supports both "disable/enable" and "mask/unmask". Right now we only use "disable/enable" and present those to Linux as "mask/unmask". This should be OK because enable/disable is optional and Linux will implement it in terms of mask/unmask. At the moment we always tell hardware all interrupts are unmasked (the boot default). - At suspend time Linux tries to call "disable" on all interrupts and also enables wakeup on all wakeup interrupts. One would think that since "disable" is implemented as "mask" when "disable" isn't provided and that since we were ignoring gc->wake_active that nothing would have woken us up. That's not the case since Linux "optimizes" things and just leaves interrutps unmasked, assuming it could mask them later when they go off. That meant that at suspend time all interrupts were actually being left enabled. With this patch random non-wakeup interrupts no longer wake the system up. Wakeup interrupts still wake the system up. Signed-off-by: Doug Anderson Reviewed-by: Dmitry Torokhov Reviewed-by: Heiko Stuebner --- Changes in v2: None drivers/pinctrl/pinctrl-rockchip.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index ba74f0a..e91e845 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -89,6 +89,7 @@ struct rockchip_iomux { * @reg_pull: optional separate register for additional pull settings * @clk: clock of the gpio bank * @irq: interrupt of the gpio bank + * @saved_enables: Saved content of GPIO_INTEN at suspend time. * @pin_base: first pin number * @nr_pins: number of pins in this bank * @name: name of the bank @@ -107,6 +108,7 @@ struct rockchip_pin_bank { struct regmap *regmap_pull; struct clk *clk; int irq; + u32 saved_enables; u32 pin_base; u8 nr_pins; char *name; @@ -1543,6 +1545,23 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type) return 0; } +static void rockchip_irq_suspend(struct irq_data *d) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); + struct rockchip_pin_bank *bank = gc->private; + + bank->saved_enables = irq_reg_readl(gc, GPIO_INTEN); + irq_reg_writel(gc, gc->wake_active, GPIO_INTEN); +} + +static void rockchip_irq_resume(struct irq_data *d) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); + struct rockchip_pin_bank *bank = gc->private; + + irq_reg_writel(gc, bank->saved_enables, GPIO_INTEN); +} + static int rockchip_interrupts_register(struct platform_device *pdev, struct rockchip_pinctrl *info) { @@ -1587,6 +1606,8 @@ static int rockchip_interrupts_register(struct platform_device *pdev, gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; + gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend; + gc->chip_types[0].chip.irq_resume = rockchip_irq_resume; gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type; gc->wake_enabled = IRQ_MSK(bank->nr_pins);