From patchwork Thu Nov 20 11:09:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jungseung Lee X-Patchwork-Id: 5347511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5CFB19F387 for ; Thu, 20 Nov 2014 11:11:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6BD9A20160 for ; Thu, 20 Nov 2014 11:11:40 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86323200CA for ; Thu, 20 Nov 2014 11:11:39 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XrPcN-0001X0-In; Thu, 20 Nov 2014 11:09:43 +0000 Received: from mail-pa0-x22b.google.com ([2607:f8b0:400e:c03::22b]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XrPcA-0001EN-Ko for linux-arm-kernel@lists.infradead.org; Thu, 20 Nov 2014 11:09:31 +0000 Received: by mail-pa0-f43.google.com with SMTP id kx10so2353095pab.16 for ; Thu, 20 Nov 2014 03:09:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=ydsTEITjUlhvvjtKA83Rkl+GFK7sn20L6l2aYu+laRg=; b=TojDYK7bVtDsHGnMWFuhUaMLdf7Pm9cXBCDxps1UiMR4NhYPZU+H36ey2PD27Bt7h7 XIgaZq0KdYEi4zCWJBTjauiOI5jNq03rTrtuJ5wWVUeDEAQP7kR1mG37vHKENJe6R40M 3d/OO1XA+xxaGCW+toXTXfkgn25ZEakD+I/Xow11g2K3MPF8cgZdT+GD/I0xuk2VpoRH Zb0Xu1LZcIg07PIVHvNtN35ceZOdrP3ljnByDFd0/tzg3f7HIwoTNvXm0WfiBayGEGTs s7FmUejssjOs4QXloAvncIwYybP2q6Bmu4Dp9fOJa34iTITddoOrCHCe4cjfYz/H3VQ+ QWbA== X-Received: by 10.68.235.70 with SMTP id uk6mr28181511pbc.152.1416481749400; Thu, 20 Nov 2014 03:09:09 -0800 (PST) Received: from localhost.localdomain ([165.132.120.48]) by mx.google.com with ESMTPSA id ou9sm1794928pbb.26.2014.11.20.03.09.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Nov 2014 03:09:08 -0800 (PST) From: Jungseung Lee To: Russell King , Catalin Marinas , Ard Biesheuvel , Laura Abbott , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH RESEND] arm: Support for the PXN CPU feature on ARMv7 Date: Thu, 20 Nov 2014 20:09:02 +0900 Message-Id: <1416481742-23868-1-git-send-email-js07.lee@gmail.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141120_030930_844429_554B0809 X-CRM114-Status: GOOD ( 14.59 ) X-Spam-Score: -0.8 (/) Cc: Jungseung Lee X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Modern ARMv7-A/R cores can optionally implement below new hardware feature: - PXN: Privileged execute-never(PXN) is a security feature. PXN bit determines whether the processor can execute software from the region. This is effective solution against ret2usr attack. On an implementation that does not include the LPAE, PXN is optionally supported. This patch set PXN bit on user page table for preventing user code execution with privilege mode. Signed-off-by: Jungseung Lee --- arch/arm/include/asm/pgalloc.h | 12 +++++++++++- arch/arm/include/asm/pgtable-2level-hwdef.h | 2 ++ arch/arm/kernel/setup.c | 7 +++++++ 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h index 78a7793..a931544 100644 --- a/arch/arm/include/asm/pgalloc.h +++ b/arch/arm/include/asm/pgalloc.h @@ -25,6 +25,10 @@ #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) +#ifdef CONFIG_CPU_V7 +extern bool cpu_has_pxn; +#endif + #ifdef CONFIG_ARM_LPAE static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) @@ -157,7 +161,13 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep) static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep) { - __pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE); +#ifdef CONFIG_CPU_V7 + if (cpu_has_pxn) + __pmd_populate(pmdp, page_to_phys(ptep), + _PAGE_USER_TABLE | PMD_PXNTABLE); + else +#endif + __pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE); } #define pmd_pgtable(pmd) pmd_page(pmd) diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h index 5cfba15..5e68278 100644 --- a/arch/arm/include/asm/pgtable-2level-hwdef.h +++ b/arch/arm/include/asm/pgtable-2level-hwdef.h @@ -20,12 +20,14 @@ #define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) #define PMD_TYPE_TABLE (_AT(pmdval_t, 1) << 0) #define PMD_TYPE_SECT (_AT(pmdval_t, 2) << 0) +#define PMD_PXNTABLE (_AT(pmdval_t, 1) << 2) /* v7 */ #define PMD_BIT4 (_AT(pmdval_t, 1) << 4) #define PMD_DOMAIN(x) (_AT(pmdval_t, (x)) << 5) #define PMD_PROTECTION (_AT(pmdval_t, 1) << 9) /* v5 */ /* * - section */ +#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 0) /* v7 */ #define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) #define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) #define PMD_SECT_XN (_AT(pmdval_t, 1) << 4) /* v6 */ diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index c031063..8556044 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -104,6 +104,9 @@ EXPORT_SYMBOL(elf_hwcap); unsigned int elf_hwcap2 __read_mostly; EXPORT_SYMBOL(elf_hwcap2); +#ifdef CONFIG_CPU_V7 +bool cpu_has_pxn; +#endif #ifdef MULTI_CPU struct processor processor __read_mostly; @@ -390,6 +393,10 @@ static void __init cpuid_init_hwcaps(void) /* LPAE implies atomic ldrd/strd instructions */ vmsa = (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xf) >> 0; +#ifdef CONFIG_CPU_V7 + if (vmsa >= 4) + cpu_has_pxn = 1; +#endif if (vmsa >= 5) elf_hwcap |= HWCAP_LPAE; }