From patchwork Sat Nov 22 10:42:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jungseung Lee X-Patchwork-Id: 5359171 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B07E79F1E1 for ; Sat, 22 Nov 2014 10:45:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8CAB52014A for ; Sat, 22 Nov 2014 10:45:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95B8C20149 for ; Sat, 22 Nov 2014 10:45:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xs8A1-00082F-H3; Sat, 22 Nov 2014 10:43:25 +0000 Received: from mail-pa0-x22a.google.com ([2607:f8b0:400e:c03::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xs89y-0007zH-0i for linux-arm-kernel@lists.infradead.org; Sat, 22 Nov 2014 10:43:22 +0000 Received: by mail-pa0-f42.google.com with SMTP id et14so6563592pad.15 for ; Sat, 22 Nov 2014 02:42:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=NSTDPY/RKGY4/GRwv31IaTmH2epNtKCxeGhHLt7diZI=; b=XnhKFOEBMD0rrZKlq4mUDQCItWgYal4HML46gPZKeTz7v8Bfsp058OsnnmsXDnFXoi 0lrFjxJWC/OW/sV4M9nUSwG1+JTzN6+V0Ao2gFsHIuJDeEhCurYya7LYDZjEZH1B3dP1 H+y0Eca6aFVeZZMfS3XFvJTyNv17sPEsEmvY2BZtper43JJCN5gmoDb2Dz2aiDK8xVBq kiVBrtGWkqRz8MY3xAcKt1O4UZj7mMami1fKAwhDQUfjg06zUel7vnoX0LqHmaD2rwNd 8SAa1Lx3QXHwmtnz/hqDa5tZRXi10UbvkcKPbCcHtHeF9aTJvVGVx6vtcHX66OHdsvUt 4YIg== X-Received: by 10.66.169.209 with SMTP id ag17mr15324207pac.62.1416652979046; Sat, 22 Nov 2014 02:42:59 -0800 (PST) Received: from localhost.localdomain ([112.150.44.91]) by mx.google.com with ESMTPSA id id2sm7084397pbb.65.2014.11.22.02.42.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 22 Nov 2014 02:42:58 -0800 (PST) From: Jungseung Lee To: Russell King , Catalin Marinas , Ard Biesheuvel , Laura Abbott , Will Deacon , linux-arm-kernel@lists.infradead.org Subject: [PATCH v1] arm: Support for the PXN CPU feature on ARMv7 Date: Sat, 22 Nov 2014 19:42:36 +0900 Message-Id: <1416652956-24207-1-git-send-email-js07.lee@gmail.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141122_024322_105152_B4F5F090 X-CRM114-Status: GOOD ( 14.92 ) X-Spam-Score: -0.8 (/) Cc: Jungseung Lee X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Modern ARMv7-A/R cores optionally implement below new hardware feature: - PXN: Privileged execute-never(PXN) is a security feature. PXN bit determines whether the processor can execute software from the region. This is effective solution against ret2usr attack. On an implementation that does not include the LPAE, PXN is optionally supported. This patch set PXN bit on user page table for preventing user code execution with privilege mode. Signed-off-by: Jungseung Lee --- Changes in v1: Define cpu_has_classic_pxn(). Set PXN bit at the PTE directly under LPAE. arch/arm/include/asm/pgalloc.h | 20 +++++++++++++++++++- arch/arm/include/asm/pgtable-2level-hwdef.h | 2 ++ arch/arm/include/asm/pgtable-3level-hwdef.h | 1 + arch/arm/include/asm/pgtable.h | 3 +++ 4 files changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h index 78a7793..e63c633 100644 --- a/arch/arm/include/asm/pgalloc.h +++ b/arch/arm/include/asm/pgalloc.h @@ -17,6 +17,7 @@ #include #include #include +#include #define check_pgt_cache() do { } while (0) @@ -25,6 +26,19 @@ #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) +static inline bool cpu_has_classic_pxn(void) +{ +#ifdef CONFIG_CPU_V7 + unsigned int vmsa; + + /* LPAE implies atomic ldrd/strd instructions */ + vmsa = (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xf) >> 0; + if (vmsa == 4) + return 1; +#endif + return 0; +} + #ifdef CONFIG_ARM_LPAE static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) @@ -157,7 +171,11 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep) static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep) { - __pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE); + if (cpu_has_classic_pxn()) + __pmd_populate(pmdp, page_to_phys(ptep), + _PAGE_USER_TABLE | PMD_PXNTABLE); + else + __pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE); } #define pmd_pgtable(pmd) pmd_page(pmd) diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h index 5cfba15..5e68278 100644 --- a/arch/arm/include/asm/pgtable-2level-hwdef.h +++ b/arch/arm/include/asm/pgtable-2level-hwdef.h @@ -20,12 +20,14 @@ #define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) #define PMD_TYPE_TABLE (_AT(pmdval_t, 1) << 0) #define PMD_TYPE_SECT (_AT(pmdval_t, 2) << 0) +#define PMD_PXNTABLE (_AT(pmdval_t, 1) << 2) /* v7 */ #define PMD_BIT4 (_AT(pmdval_t, 1) << 4) #define PMD_DOMAIN(x) (_AT(pmdval_t, (x)) << 5) #define PMD_PROTECTION (_AT(pmdval_t, 1) << 9) /* v5 */ /* * - section */ +#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 0) /* v7 */ #define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) #define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) #define PMD_SECT_XN (_AT(pmdval_t, 1) << 4) /* v6 */ diff --git a/arch/arm/include/asm/pgtable-3level-hwdef.h b/arch/arm/include/asm/pgtable-3level-hwdef.h index 9fd61c7..f8f1cff 100644 --- a/arch/arm/include/asm/pgtable-3level-hwdef.h +++ b/arch/arm/include/asm/pgtable-3level-hwdef.h @@ -76,6 +76,7 @@ #define PTE_EXT_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ #define PTE_EXT_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ #define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* nG */ +#define PTE_EXT_PXN (_AT(pteval_t, 1) << 53) /* PXN */ #define PTE_EXT_XN (_AT(pteval_t, 1) << 54) /* XN */ /* diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 3b30062..04db03c 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -247,6 +247,9 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, if (!pte_special(pteval)) __sync_icache_dcache(pteval); ext |= PTE_EXT_NG; +#ifdef CONFIG_ARM_LPAE + ext |= PTE_EXT_PXN; +#endif } set_pte_ext(ptep, pteval, ext);