From patchwork Thu Nov 27 00:13:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 5390551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C780EC11AC for ; Thu, 27 Nov 2014 00:20:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EFC0B20204 for ; Thu, 27 Nov 2014 00:20:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 445DA2020E for ; Thu, 27 Nov 2014 00:20:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XtmlU-0007cH-Oy; Thu, 27 Nov 2014 00:16:56 +0000 Received: from mail-pa0-f45.google.com ([209.85.220.45]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xtmil-0004uG-5E for linux-arm-kernel@lists.infradead.org; Thu, 27 Nov 2014 00:14:08 +0000 Received: by mail-pa0-f45.google.com with SMTP id lj1so3824236pab.18 for ; Wed, 26 Nov 2014 16:13:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nccPITiLMD1UE8v7Zt/tvDyzeBh/hEy1NM+FGessnuA=; b=XEv/rc5fl5hOoPnsm9nD+dXjKDjDDbWW/o4WxNy3DPKnCI1AcYpKvMRjuWSnb5Shsw aZi3+oqQ1KosGmAHuezA0M99A2ysjLbBdUa/rm373QsUfEjeWQqTUyRvf+phbI6gIl+Z RERwvupKOLSNE+Qa6KqRnIcA91R+1bLo1ukU9i6q3oOIawXpXhwGPBGr3TwsSiGuPEeF bGds6FOOllg6ZktHK+GucW0PfNcVsGMyaYQgKUlru1HIlQdkcrd24H8hH/tuWcWYGtq5 axx7r5RCqnu9YRZo25eXOww0DIxU5Ib+uLsEekIrr8Oe72gwhWX73nRXNLTgus5r+lA8 LgXA== X-Gm-Message-State: ALoCoQmK8797qFPJEvkzN/V6R2EpgbG5L50MyBKkyYjY6bqLuorEnacO8N4VlbbdumoTMGajiLNP X-Received: by 10.68.57.144 with SMTP id i16mr57618581pbq.86.1417047226305; Wed, 26 Nov 2014 16:13:46 -0800 (PST) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id yb8sm5403070pab.7.2014.11.26.16.13.44 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 26 Nov 2014 16:13:45 -0800 (PST) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v12 08/10] arm: dts: qcom: Add idle states device nodes for 8074 Date: Wed, 26 Nov 2014 17:13:13 -0700 Message-Id: <1417047195-18978-9-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1417047195-18978-1-git-send-email-lina.iyer@linaro.org> References: <1417047195-18978-1-git-send-email-lina.iyer@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141126_161407_268317_D9620594 X-CRM114-Status: UNSURE ( 7.97 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: msivasub@codeaurora.org, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, Lina Iyer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ARM common idle states device bindings for cpuidle support for APQ 8074/8974. Support Standby and Standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer Reviewed-by: Stephen Boyd --- arch/arm/boot/dts/qcom-msm8974.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 5a41f44..6942b46 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -22,6 +22,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@1 { @@ -32,6 +33,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@2 { @@ -42,6 +44,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@3 { @@ -52,6 +55,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; L2: l2-cache { @@ -59,6 +63,22 @@ cache-level = <2>; qcom,saw = <&saw_l2>; }; + + idle-states { + CPU_STBY: standby { + compatible = "qcom,idle-state-stby", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <2000>; + }; + }; }; cpu-pmu {