From patchwork Thu Nov 27 05:24:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 5391761 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A93C79F39B for ; Thu, 27 Nov 2014 05:30:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DEE7D201EC for ; Thu, 27 Nov 2014 05:30:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 162C9201E4 for ; Thu, 27 Nov 2014 05:30:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xtrch-00055N-0K; Thu, 27 Nov 2014 05:28:11 +0000 Received: from mail-pd0-f179.google.com ([209.85.192.179]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XtrZm-0001up-50 for linux-arm-kernel@lists.infradead.org; Thu, 27 Nov 2014 05:25:10 +0000 Received: by mail-pd0-f179.google.com with SMTP id w10so4219626pde.38 for ; Wed, 26 Nov 2014 21:24:49 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tMV/DLHfXN36vq1dR15QjpR7cmBxD4JuqEcporTSGUs=; b=OOrmJ6O+p7cVJJ+X+BhWjpAYYPQt9XEHh08nstvduxN16GAXZeN5vhBgbXLrPdiRtF K3BpldArGG5NjRLPIpBWogYllrGPKEqqSljt3m+N26F+/Q/nOWd/pmiPsVWFUU8JeaNe R3alvgqf4/h++tXDJ5mtvQXllENnRFrrWFK0EY6967OHaI+Mc6KlINRjOgE4OxAOeLwf xqEt4c8OTpOf9UJ3qWGadf3fqWlIN6qniXrhaCLJ3J/5Gaxt6QHTJgMcQ8iIXF9spxtP 2lalKzH8NpQxKutqHgsfHAzdfZ5q4dQVJGKaxrP1IIkxh5VMkuQOwY7feUDOCsSqZlqy zTQA== X-Gm-Message-State: ALoCoQkJ1p6F+0IB9V/DD4MZMbAzDsSZEHtGYwq1BxczagweJohzXcpWFEjxIfRqVK5BMWmTjtbA X-Received: by 10.68.110.4 with SMTP id hw4mr16747724pbb.48.1417065889127; Wed, 26 Nov 2014 21:24:49 -0800 (PST) Received: from ubuntu.localdomain (c-24-8-37-141.hsd1.co.comcast.net. [24.8.37.141]) by mx.google.com with ESMTPSA id wl10sm5829131pbc.58.2014.11.26.21.24.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 26 Nov 2014 21:24:48 -0800 (PST) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v13 10/10] arm: dts: qcom: Add idle state device nodes for 8064 Date: Wed, 26 Nov 2014 22:24:14 -0700 Message-Id: <1417065854-37745-11-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1417065854-37745-1-git-send-email-lina.iyer@linaro.org> References: <1417065854-37745-1-git-send-email-lina.iyer@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141126_212510_328169_EF6FF80B X-CRM114-Status: UNSURE ( 7.98 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: msivasub@codeaurora.org, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, Lina Iyer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ARM common idle state device bindings for cpuidle support for APQ 8064. Support Standby and Standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer Reviewed-by: Stephen Boyd --- arch/arm/boot/dts/qcom-apq8064.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 9fd24bc..ab21dba 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -23,6 +23,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@1 { @@ -33,6 +34,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@2 { @@ -43,6 +45,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@3 { @@ -53,12 +56,29 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; L2: l2-cache { compatible = "cache"; cache-level = <2>; }; + + idle-states { + CPU_STBY: standby { + compatible = "qcom,idle-state-stby", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <400>; + exit-latency-us = <900>; + min-residency-us = <3000>; + }; + }; }; cpu-pmu {