From patchwork Tue Dec 2 17:39:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 5422331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BDB9ABEEA8 for ; Tue, 2 Dec 2014 17:48:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D9C9420295 for ; Tue, 2 Dec 2014 17:48:29 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E3E30201ED for ; Tue, 2 Dec 2014 17:48:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XvrWX-0003M7-JV; Tue, 02 Dec 2014 17:46:05 +0000 Received: from mail-pd0-f174.google.com ([209.85.192.174]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XvrRk-0006DF-Jg for linux-arm-kernel@lists.infradead.org; Tue, 02 Dec 2014 17:41:09 +0000 Received: by mail-pd0-f174.google.com with SMTP id w10so13498887pde.5 for ; Tue, 02 Dec 2014 09:40:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aGHLAMN8SOD7wvJdYSUHNVxXdEomO9cFQ8ePV6ZDScE=; b=JaesW7avgdKZSAyw7FA/xOsPSs33Y4ebpAocu6Pv6GSdMZH0UprP3YTfxirXEBo1Fm 5rKwUTgrEXBkWeKLxtZzHQ8h0fA/Ji3XxWaAOyUiOqCz4Ksxbtq+0NDMkUt+benwujSD PUy/sV3iBJMObe7v/mVT2ipJMCqEybO6ozj29303xvDAmm/zBNHievpeEbtWYQF+Amh2 7fCgOcAhwfxzBpM+ioyNCYzUfrYrxNpz35IrYna22TqvKzn7u7TwdPqsDn7JXnCpNQVh bFNfAkGn5XBmO8F2XaB5ogEANBa4jvlxgnvwA7OLGzNVVUl79NDbCDTf358BZlkZrIdZ U/Eg== X-Gm-Message-State: ALoCoQnciATTWohosS4JrZW03HKNR+Wx368CLPa9q2uoTKzxtr4DJM/VJZs5QLxS4JCkGto6/+lh X-Received: by 10.66.219.70 with SMTP id pm6mr726196pac.126.1417542047372; Tue, 02 Dec 2014 09:40:47 -0800 (PST) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id q3sm20928900pdn.23.2014.12.02.09.40.45 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 02 Dec 2014 09:40:46 -0800 (PST) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v14 10/10] arm: dts: qcom: Add idle state device nodes for 8064 Date: Tue, 2 Dec 2014 10:39:18 -0700 Message-Id: <1417541958-56907-11-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1417541958-56907-1-git-send-email-lina.iyer@linaro.org> References: <1417541958-56907-1-git-send-email-lina.iyer@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141202_094108_716247_E505BBE4 X-CRM114-Status: UNSURE ( 7.71 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: msivasub@codeaurora.org, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, Lina Iyer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ARM common idle state device bindings for cpuidle support for APQ 8064. Support Standby and Standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer Reviewed-by: Stephen Boyd --- arch/arm/boot/dts/qcom-apq8064.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 9fd24bc..08893fd 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -23,6 +23,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@1 { @@ -33,6 +34,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@2 { @@ -43,6 +45,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@3 { @@ -53,12 +56,31 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; L2: l2-cache { compatible = "cache"; cache-level = <2>; }; + + idle-states { + CPU_STBY: standby { + compatible = "qcom,idle-state-stby", + "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", + "arm,idle-state"; + entry-latency-us = <400>; + exit-latency-us = <900>; + min-residency-us = <3000>; + }; + }; }; cpu-pmu {