From patchwork Thu Dec 18 20:59:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 5516101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8FF029F507 for ; Thu, 18 Dec 2014 21:06:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A29BA2035E for ; Thu, 18 Dec 2014 21:06:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA65E200E8 for ; Thu, 18 Dec 2014 21:06:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y1iEq-0005xl-1n; Thu, 18 Dec 2014 21:04:00 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y1iEl-0005pX-Hm for linux-arm-kernel@lists.infradead.org; Thu, 18 Dec 2014 21:03:56 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 88199140050; Thu, 18 Dec 2014 21:03:34 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 776D1140067; Thu, 18 Dec 2014 21:03:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: agross@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B6D15140050; Thu, 18 Dec 2014 21:03:33 +0000 (UTC) From: Andy Gross To: Linus Walleij Subject: [PATCH 1/4] pinctrl: qcom: Add multiple copy base support Date: Thu, 18 Dec 2014 14:59:52 -0600 Message-Id: <1418936395-14623-2-git-send-email-agross@codeaurora.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1418936395-14623-1-git-send-email-agross@codeaurora.org> References: <1418936395-14623-1-git-send-email-agross@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141218_130355_627624_B291AD9B X-CRM114-Status: GOOD ( 17.68 ) X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Qualcomm pinctrl devices support functions that can be routed to multiple pins. In some cases, there are additional mux registers that must be set for the pins to work correctly. Signed-off-by: Andy Gross --- drivers/pinctrl/qcom/pinctrl-msm.c | 10 ++++++++++ drivers/pinctrl/qcom/pinctrl-msm.h | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index e730935..17e2867 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -141,11 +141,13 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, { struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); const struct msm_pingroup *g; + const struct msm_function *f; unsigned long flags; u32 val; int i; g = &pctrl->soc->groups[group]; + f = &pctrl->soc->functions[function]; for (i = 0; i < g->nfuncs; i++) { if (g->funcs[i] == function) @@ -162,6 +164,14 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, val |= i << g->mux_bit; writel(val, pctrl->regs + g->ctl_reg); + /* + * if an alternate copy configuration is required, configure the pins to + * steer the function to the correct set of pins. This is used in cases + * where we have more than one copy of the pins for a function + */ + if (f->requires_copy_select) + writel(f->copy_select_value, pctrl->regs + f->copy_select_reg); + spin_unlock_irqrestore(&pctrl->lock, flags); return 0; diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index b952c4b..7180587 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -25,6 +25,10 @@ struct msm_function { const char *name; const char * const *groups; unsigned ngroups; + + unsigned requires_copy_select; + unsigned copy_select_reg; + unsigned copy_select_value; }; /**