From patchwork Thu Dec 18 20:59:54 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 5516141 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 24D069F507 for ; Thu, 18 Dec 2014 21:06:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 220622035E for ; Thu, 18 Dec 2014 21:06:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 01BE9200E8 for ; Thu, 18 Dec 2014 21:06:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y1iF7-00062W-01; Thu, 18 Dec 2014 21:04:17 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Y1iEl-0005q9-Hl for linux-arm-kernel@lists.infradead.org; Thu, 18 Dec 2014 21:03:57 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id D484D140067; Thu, 18 Dec 2014 21:03:36 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id C25A314006C; Thu, 18 Dec 2014 21:03:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: agross@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id F24BD140067; Thu, 18 Dec 2014 21:03:35 +0000 (UTC) From: Andy Gross To: Linus Walleij Subject: [PATCH 3/4] pinctrl: qcom: apq8064: Add multi copy support Date: Thu, 18 Dec 2014 14:59:54 -0600 Message-Id: <1418936395-14623-4-git-send-email-agross@codeaurora.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1418936395-14623-1-git-send-email-agross@codeaurora.org> References: <1418936395-14623-1-git-send-email-agross@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141218_130355_683024_4A129EB6 X-CRM114-Status: GOOD ( 14.78 ) X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Kumar Gala , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds multiple copy support for functions that can be mapped to more than one pin and that also require an additional mux configuration setting to work properly. Signed-off-by: Andy Gross --- .../bindings/pinctrl/qcom,apq8064-pinctrl.txt | 3 +- drivers/pinctrl/qcom/pinctrl-apq8064.c | 29 +++++++++++++++----- 2 files changed, 24 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt index a7bde64..37ffe9b 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt @@ -50,7 +50,8 @@ Valid values for function are: gsbi4_cam_i2c, gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6, gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3, gsbi7, gsbi7_spi_cs1, gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm, - riva_wlan, sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic, ps_hold + riva_wlan, sdc2, sdc4, slimbus_a, slimbus_b, spkr_i2s, tsif1, tsif2, + usb2_hsic, ps_hold Example: diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c b/drivers/pinctrl/qcom/pinctrl-apq8064.c index cd96699..e2d1dc1 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8064.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c @@ -224,6 +224,16 @@ static const unsigned int sdc3_data_pins[] = { 95 }; .ngroups = ARRAY_SIZE(fname##_groups), \ } +#define FUNCTION_MULTI_COPY(fname, reg, value) \ + [APQ_MUX_##fname] = { \ + .name = #fname, \ + .groups = fname##_groups, \ + .ngroups = ARRAY_SIZE(fname##_groups), \ + .requires_copy_select = 1, \ + .copy_select_reg = reg, \ + .copy_select_value = value, \ + } + #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \ { \ .name = "gpio" #id, \ @@ -321,7 +331,8 @@ enum apq8064_functions { APQ_MUX_riva_wlan, APQ_MUX_sdc2, APQ_MUX_sdc4, - APQ_MUX_slimbus, + APQ_MUX_slimbus_a, + APQ_MUX_slimbus_b, APQ_MUX_spkr_i2s, APQ_MUX_tsif1, APQ_MUX_tsif2, @@ -432,9 +443,12 @@ static const char * const sdc2_groups[] = { static const char * const sdc4_groups[] = { "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68" }; -static const char * const slimbus_groups[] = { +static const char * const slimbus_a_groups[] = { "gpio40", "gpio41" }; +static const char * const slimbus_b_groups[] = { + "gpio30", "gpio31" +}; static const char * const spkr_i2s_groups[] = { "gpio47", "gpio48", "gpio49", "gpio50" }; @@ -478,7 +492,8 @@ static const struct msm_function apq8064_functions[] = { FUNCTION(riva_wlan), FUNCTION(sdc2), FUNCTION(sdc4), - FUNCTION(slimbus), + FUNCTION_MULTI_COPY(slimbus_a, 0x2074, 0), + FUNCTION_MULTI_COPY(slimbus_b, 0x2074, 1), FUNCTION(spkr_i2s), FUNCTION(tsif1), FUNCTION(tsif2), @@ -517,8 +532,8 @@ static const struct msm_pingroup apq8064_groups[] = { PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA), + PINGROUP(30, mi2s, slimbus_b, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(31, mi2s, slimbus_b, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA), PINGROUP(32, mi2s, NA, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA), PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(34, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), @@ -527,8 +542,8 @@ static const struct msm_pingroup apq8064_groups[] = { PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(40, slimbus_a, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(41, slimbus_a, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),