From patchwork Tue Jan 13 11:27:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Padmavathi Venna X-Patchwork-Id: 5619491 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 746EFC058D for ; Tue, 13 Jan 2015 11:38:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC9E6202A1 for ; Tue, 13 Jan 2015 11:38:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CCB5B2013A for ; Tue, 13 Jan 2015 11:38:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YAzlm-0000C5-Tq; Tue, 13 Jan 2015 11:36:22 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YAzlV-0008RM-GN for linux-arm-kernel@lists.infradead.org; Tue, 13 Jan 2015 11:36:06 +0000 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NI400A6J5JATTE0@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 13 Jan 2015 20:35:34 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.123]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 5B.C8.18484.60305B45; Tue, 13 Jan 2015 20:35:34 +0900 (KST) X-AuditID: cbfee68f-f791c6d000004834-43-54b5030604f0 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id E5.7D.20081.60305B45; Tue, 13 Jan 2015 20:35:34 +0900 (KST) Received: from chromebld-server.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NI4000TA5INSD90@mmp2.samsung.com>; Tue, 13 Jan 2015 20:35:34 +0900 (KST) From: Padmavathi Venna To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 1/3] clk: samsung: exynos7: add gate clock for DMA block Date: Tue, 13 Jan 2015 16:57:40 +0530 Message-id: <1421148462-11755-2-git-send-email-padma.v@samsung.com> X-Mailer: git-send-email 2.2.0 In-reply-to: <1421148462-11755-1-git-send-email-padma.v@samsung.com> References: <1421148462-11755-1-git-send-email-padma.v@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsWyRsSkWpeNeWuIwarn5ha9C66yWWx6fI3V Ysb5fUwWTydcZLM4/Kad1WLVrj+MDmweO2fdZfe4c20Pm8fmJfUefVtWMXp83iQXwBrFZZOS mpNZllqkb5fAlXHz0Sz2gl08FY1vtzI3MF7h6mLk5JAQMJH4v2YHI4QtJnHh3nq2LkYuDiGB pYwSLavPscIU3dl4nRkiMZ1R4sKdrSwQzgQmiZWbfrB3MXJwsAnoSLScdQExRQS8JZZfUwTp ZRZIlJj6rZMdxBYW8JC4fv0MI0gJi4CqxIdZoSAmr4CzRN/MIohNchJbbj0Cq+YUcJH4sf4+ E0iJEFDJnC4VkJ0SAv3sElcvLQerYREQkPg2+RALSI2EgKzEpgPMEGMkJQ6uuMEygVF4ASPD KkbR1ILkguKk9CJjveLE3OLSvHS95PzcTYzAkD7971n/Dsa7B6wPMQpwMCrx8O7I3hIixJpY VlyZe4jRFGjDRGYp0eR8YOTklcQbGpsZWZiamBobmVuaKYnzLpT6GSwkkJ5YkpqdmlqQWhRf VJqTWnyIkYmDU6qB8WRba+rlPys8yyV/zXyiuGfbPqcNchVvHwVz33rjVsV+e1P4Kb7Zdhvn v7t63lngUJdru/4Bscr4JyeE+TUNN0zcP2GfHdf7BjbTyNuW4q0djn2LJ7h+7HvrNH/mlb2m 9QpePl7bHCvORB49ONGpviVs3k/eXbNf37rntvlw16/4U9xrE6L9a5RYijMSDbWYi4oTAfSe zA9kAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprNIsWRmVeSWpSXmKPExsVy+t9jQV025q0hBgsOGFj0LrjKZrHp8TVW ixnn9zFZPJ1wkc3i8Jt2VotVu/4wOrB57Jx1l93jzrU9bB6bl9R79G1ZxejxeZNcAGtUA6NN RmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2Si0+ArltmDtAFSgpliTml QKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaMm49msRfs4qlofLuVuYHxClcXIyeH hICJxJ2N15khbDGJC/fWs3UxcnEICUxnlLhwZysLhDOBSWLlph/sXYwcHGwCOhItZ11ATBEB b4nl1xRBepkFEiWmfutkB7GFBTwkrl8/wwhSwiKgKvFhViiIySvgLNE3swhik5zElluPwKo5 BVwkfqy/zwRSIgRUMqdLZQIj7wJGhlWMoqkFyQXFSem5hnrFibnFpXnpesn5uZsYwRHzTGoH 48oGi0OMAhyMSjy8AnlbQoRYE8uKK3MPMUpwMCuJ8KZ/BwrxpiRWVqUW5ccXleakFh9iNAU6 aSKzlGhyPjCa80riDY1NzE2NTS1NLEzMLJXEeZXs20KEBNITS1KzU1MLUotg+pg4OKUaGG1N N4veebfMlbc0SbcjcduUKF7XUw7xLifLzJpZ1k17lzPh6/KPKaL2W+TflU7mPLFT4Lxatsmq Zp5p16Y+3G4cquKn3t//Yf/1Tb4zX83inL3hdrHPtxVcm2tC1xT857jxwP1P3tZ7MyL3/l7+ 9Fbq05c7lllKHw3e5tjDPEP7yhczg07TW4lKLMUZiYZazEXFiQDjviXmrgIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150113_033605_748047_5D2CC90B X-CRM114-Status: UNSURE ( 9.24 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.0 (-----) Cc: kgene.kim@samsung.com, mturquette@linaro.org, tomasz.figa@gmail.com, s.nawrocki@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for PDMA0 and PDMA1 gate clks. Signed-off-by: Padmavathi Venna Signed-off-by: Sylwester Nawrocki --- drivers/clk/samsung/clk-exynos7.c | 4 ++++ include/dt-bindings/clock/exynos7-clk.h | 4 +++- 2 files changed, 7 insertions(+), 1 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index 945f41c..d01d766 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -722,6 +722,10 @@ static struct samsung_gate_clock fsys0_gate_clks[] __initdata = { GATE(ACLK_AXIUS_USBDRD30X_FSYS0X, "aclk_axius_usbdrd30x_fsys0x", "mout_aclk_fsys0_200_user", ENABLE_ACLK_FSYS00, 19, 0, 0), + GATE(ACLK_PDMA1, "aclk_pdma1", "mout_aclk_fsys0_200_user", + ENABLE_ACLK_FSYS00, 3, 0, 0), + GATE(ACLK_PDMA0, "aclk_pdma0", "mout_aclk_fsys0_200_user", + ENABLE_ACLK_FSYS00, 4, 0, 0), GATE(ACLK_USBDRD300, "aclk_usbdrd300", "mout_aclk_fsys0_200_user", ENABLE_ACLK_FSYS01, 29, 0, 0), diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h index e33d0ca..05e2a47 100644 --- a/include/dt-bindings/clock/exynos7-clk.h +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -91,7 +91,9 @@ #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 #define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER 7 #define OSCCLK_PHY_CLKOUT_USB30_PHY 8 -#define FSYS0_NR_CLK 9 +#define ACLK_PDMA0 9 +#define ACLK_PDMA1 10 +#define FSYS0_NR_CLK 11 /* FSYS1 */ #define ACLK_MMC1 1