From patchwork Thu Jan 15 01:50:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 5636321 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 63FE8C058E for ; Thu, 15 Jan 2015 01:54:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3DE55201CD for ; Thu, 15 Jan 2015 01:54:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5393E20120 for ; Thu, 15 Jan 2015 01:54:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YBZbY-0003Ds-PM; Thu, 15 Jan 2015 01:52:12 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YBZat-00030a-Ar for linux-arm-kernel@lists.infradead.org; Thu, 15 Jan 2015 01:51:32 +0000 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NI700FXU3T44UD0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 15 Jan 2015 10:51:05 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.112]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id C6.FC.17016.80D17B45; Thu, 15 Jan 2015 10:51:04 +0900 (KST) X-AuditID: cbfee68d-f79296d000004278-1b-54b71d08789f Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id A4.2A.09430.80D17B45; Thu, 15 Jan 2015 10:51:04 +0900 (KST) Received: from chan.10.32.193.11 ([10.252.81.195]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NI700EDT3T3DSD0@mmp2.samsung.com>; Thu, 15 Jan 2015 10:51:04 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kgene@kernel.org Subject: [PATCH v4 5/9] ARM: dts: Add memory bus node for Exynos4x12 Date: Thu, 15 Jan 2015 10:50:53 +0900 Message-id: <1421286657-4720-6-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.5.5 In-reply-to: <1421286657-4720-1-git-send-email-cw00.choi@samsung.com> References: <1421286657-4720-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsWyRsSkQJdDdnuIwdevZhaP1yxmstg4Yz2r xfUvz1ktJt2fwGLx+oWhRf/j18wWZ5vesFtsenyN1eLyrjlsFp97jzBazDi/j8li6fWLTBa3 G1ewWTxe8ZbdonXvEXaLVbv+MDoIeKyZt4bRY+esu+wei/e8ZPLYtKqTzWPzknqPvi2rGD0+ b5ILYI/isklJzcksSy3St0vgytj4YBJTwWyZioXztzI2MF4S6WLk5JAQMJG4eriRFcIWk7hw bz1bFyMXh5DAUkaJS79fssMU3VrWxwKRmM4o8en8RmaQhJBAE5PE06ZsEJtNQEti/4sbbCC2 iICeROexPWDNzAJ/mCSaNrGA2MICLhJPPtxhArFZBFQlJi9ZARbnBYqvnv6CDWKZgsSy5TPB LuIUcJXo+bWfHWKXi8Squ5MZQY6QEHjJLvHy+g1WiEECEt8mHwIaxAGUkJXYdIAZYo6kxMEV N1gmMAovYGRYxSiaWpBcUJyUXmSoV5yYW1yal66XnJ+7iREYUaf/PevdwXj7gPUhRgEORiUe XocjW0OEWBPLiitzDzGaAm2YyCwlmpwPjNu8knhDYzMjC1MTU2Mjc0szJXFeRamfwUIC6Ykl qdmpqQWpRfFFpTmpxYcYmTg4pRoYOz3uu388vVF6ytorD/9NOCNRaLz/sv/G6auNvnxbL7tt bdBx9aRDTfPn7Pgvd9+B/12m23rmhM3ftLxtw9W/npv84cUGji1b/v1VdjzvLdcrk7PoYNLV 4IaLD72E1jL6XpGwEuSSiJ68uum6zIbXu+Ya2zznyJR4+DuuRXfd9DUm69/0ze1uZ1RiKc5I NNRiLipOBABSTIIFowIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFIsWRmVeSWpSXmKPExsVy+t9jQV0O2e0hBq8361s8XrOYyWLjjPWs Fte/PGe1mHR/AovF6xeGFv2PXzNbnG16w26x6fE1VovLu+awWXzuPcJoMeP8PiaLpdcvMlnc blzBZvF4xVt2i9a9R9gtVu36w+gg4LFm3hpGj52z7rJ7LN7zkslj06pONo/NS+o9+rasYvT4 vEkugD2qgdEmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX0NLCXEkhLzE31VbJxSdA1y0z B+h4JYWyxJxSoFBAYnGxkr4dpgmhIW66FjCNEbq+IUFwPUYGaCBhDWPGxgeTmApmy1QsnL+V sYHxkkgXIyeHhICJxK1lfSwQtpjEhXvr2boYuTiEBKYzSnw6v5EZJCEk0MQk8bQpG8RmE9CS 2P/iBhuILSKgJ9F5bA87iM0s8IdJomkT2CBhAReJJx/uMIHYLAKqEpOXrACL8wLFV09/wQax TEFi2fKZrCA2p4CrRM+v/ewQu1wkVt2dzDiBkXcBI8MqRtHUguSC4qT0XCO94sTc4tK8dL3k /NxNjOB4fSa9g3FVg8UhRgEORiUeXocjW0OEWBPLiitzDzFKcDArifC+/bQtRIg3JbGyKrUo P76oNCe1+BCjKdBVE5mlRJPzgakkryTe0NjEzMjSyNzQwsjYXEmcV8m+LURIID2xJDU7NbUg tQimj4mDU6qBUdWo4n3hySYutectCewbL7nudv9zL/7vkarZq5zFHBUdo6Oq8qfG3RLJbtso on9ctLPEU+3og0+egZd+urzZ9v1SL2OFNpPGi1nCnsYHzXUaFpostnybs2qTSTv7YWMRxjMZ DlzWeYzlRy7FTF50lmX6dMluF8XNG+5m9M7V3za1++IWB+8HSizFGYmGWsxFxYkAUzG7fu0C AAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150114_175131_531840_5AC7D695 X-CRM114-Status: UNSURE ( 8.12 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.0 (-----) Cc: mark.rutland@arm.com, k.kozlowski@samsung.com, linux-samsung-soc@vger.kernel.org, b.zolnierkie@samsung.com, linux-pm@vger.kernel.org, rafael.j.wysocki@intel.com, tomasz.figa@gmail.com, linux-kernel@vger.kernel.org, inki.dae@samsung.com, cw00.choi@samsung.com, kyungmin.park@samsung.com, robh+dt@kernel.org, a.kesavan@samsung.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the memory bus node for Exynos4x12 SoC. Exynos4x12 SoC has two memory bus to translate data between DRAM and eMMC/sub-IPs. Following list specifies the detailed relation between memory bus clock and DMC IP in MIF (Memory Interface) block: - DMC/ACP clock : DMC (Dynamic Memory Controller) Following list specifies the detailed relation between memory bus clock and sub-IPs in INT (Internal) block: - ACLK100 clock : PERIL/PERIR/MFC(PCLK) - ACLK160 clock : CAM/TV/LCD - ACLK133 clock : FSYS - GDL/GDR clock : leftbus/rightbus - SCLK_MFC clock : MFC Cc: Kukjin Kim Cc: Myungjoo Ham Cc: Kyungmin Park Signed-off-by: Chanwoo Choi Acked-by: Myungjoo Ham --- arch/arm/boot/dts/exynos4x12.dtsi | 121 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 93b7040..44f6272 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -31,6 +31,127 @@ mshc0 = &mshc_0; }; + memory_bus_mif: memory_bus@0 { + compatible = "samsung,exynos-memory-bus"; + + operating-points = < + 400000 1100000 + 200000 1000000 + 160000 950000 + 133000 950000 + 100000 950000>; + status = "disabled"; + + blocks { + dmc_block: memory_bus_block1 { + clocks = <&clock CLK_DIV_DMC>; + clock-names = "memory-bus"; + frequency = < + 400000 + 200000 + 160000 + 133000 + 100000>; + }; + + acp_block: memory_bus_block2 { + clocks = <&clock CLK_DIV_ACP>; + clock-names = "memory-bus"; + frequency = < + 200000 + 160000 + 133000 + 133000 + 100000>; + }; + + c2c_block: memory_bus_block3 { + clocks = <&clock CLK_DIV_C2C>; + clock-names = "memory-bus"; + frequency = < + 400000 + 200000 + 160000 + 133000 + 100000>; + }; + }; + }; + + memory_bus_int: memory_bus@1 { + compatible = "samsung,exynos-memory-bus"; + + operating-points = < + 200000 1000000 + 160000 950000 + 133000 925000 + 100000 900000>; + + status = "disabled"; + + blocks { + peri_block: memory_bus_block1 { + clocks = <&clock CLK_ACLK100>; + clock-names = "memory-bus"; + frequency = < + 100000 + 100000 + 100000 + 100000>; + }; + + fsys_block: memory_bus_block2 { + clocks = <&clock CLK_ACLK133>; + clock-names = "memory-bus"; + frequency = < + 133000 + 133000 + 100000 + 100000>; + }; + + display_block: memory_bus_block3 { + clocks = <&clock CLK_ACLK160>; + clock-names = "memory-bus"; + frequency = < + 160000 + 160000 + 133000 + 100000>; + }; + + leftbus_block: memory_bus_block4 { + clocks = <&clock CLK_DIV_GDL>; + clock-names = "memory-bus"; + frequency = < + 200000 + 160000 + 133000 + 100000>; + }; + + rightbus_block: memory_bus_block5 { + clocks = <&clock CLK_DIV_GDR>; + clock-names = "memory-bus"; + frequency = < + 200000 + 160000 + 133000 + 100000>; + }; + + mfc_block: memory_bus_block6 { + clocks = <&clock CLK_SCLK_MFC>; + clock-names = "memory-bus"; + frequency = < + 200000 + 160000 + 133000 + 100000>; + }; + }; + }; + sysram@02020000 { compatible = "mmio-sram"; reg = <0x02020000 0x40000>;