From patchwork Tue Jan 20 12:36:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 5669021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0690EC058D for ; Tue, 20 Jan 2015 12:41:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3C82D20303 for ; Tue, 20 Jan 2015 12:41:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6AE1520306 for ; Tue, 20 Jan 2015 12:41:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YDY63-0000xK-Pr; Tue, 20 Jan 2015 12:39:51 +0000 Received: from mail-la0-x22a.google.com ([2a00:1450:4010:c03::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YDY5w-0000b9-2g for linux-arm-kernel@lists.infradead.org; Tue, 20 Jan 2015 12:39:44 +0000 Received: by mail-la0-f42.google.com with SMTP id ms9so11744089lab.1 for ; Tue, 20 Jan 2015 04:39:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=QmmVkxwNHFi8Ezy2o/gWKfjWZequ3qSqiwlJ7t5JSPY=; b=UcNvgy3VNmXRPPo2w2ORTqnVnMNAO6plITezAZROvNytP9vkri+nyphpnq0zkx3ZXS W2CvgY46wGvrXqb7wWJy0sFjQuNk5rhQEEs4zFF8Xwn72SfH3UsaKhN889HJwtuYm012 VqZvVoK/e6gelgYMKD9dU2yo0QJaiVAj1Vsyy61ORQN1x/SoEgTBAPZ5zHRuP9wh8S14 5EXH7DRnmAlBD9A4NpkLiXRcYHI0g8+JRc7n9uvgERikWC7J8MZ/bVSYstZ5L1pM/nOr RpucEJ+e5ndlRuaihUjapntCX/TYgASl1rD9FwYx1uhnGjbu9Zug+DZlHmbIwbD4In2R Zz1w== X-Received: by 10.152.43.77 with SMTP id u13mr37450047lal.93.1421757560606; Tue, 20 Jan 2015 04:39:20 -0800 (PST) Received: from localhost.localdomain (ppp95-165-114-106.pppoe.spdop.ru. [95.165.114.106]) by mx.google.com with ESMTPSA id ao2sm4571298lac.8.2015.01.20.04.39.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Jan 2015 04:39:19 -0800 (PST) From: Dmitry Osipenko To: digetx@gmail.com, Russell King Subject: [PATCH 2/2] ARM: l2c: Maintain CPU endianness for early resume function Date: Tue, 20 Jan 2015 15:36:55 +0300 Message-Id: <1421757420-20983-1-git-send-email-digetx@gmail.com> X-Mailer: git-send-email 2.2.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150120_043944_364443_53CCFB8F X-CRM114-Status: UNSURE ( 9.08 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.8 (/) Cc: linux-tegra@vger.kernel.org, Ben Dooks , linux-arm-kernel@lists.infradead.org, Bob Mottram , linux-kernel@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In big endian CPU mode l2x0_saved_regs structure stores registers values in BE format. In order to maintain BE CPU mode, these values and immediate constants must be converted back to LE format before writing them to cache controller. Signed-off-by: Dmitry Osipenko Acked-by: Russell King --- arch/arm/mm/l2c-l2x0-resume.S | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/mm/l2c-l2x0-resume.S b/arch/arm/mm/l2c-l2x0-resume.S index fda415e..9f99c7e 100644 --- a/arch/arm/mm/l2c-l2x0-resume.S +++ b/arch/arm/mm/l2c-l2x0-resume.S @@ -30,6 +30,15 @@ ENTRY(l2c310_early_resume) teq r1, #0 reteq lr + @ Reverse for big endian kernel +ARM_BE8(rev r2, r2) +ARM_BE8(rev r3, r3) +ARM_BE8(rev r4, r4) +ARM_BE8(rev r5, r5) +ARM_BE8(rev r6, r6) +ARM_BE8(rev r7, r7) +ARM_BE8(rev r8, r8) + @ The prefetch and power control registers are revision dependent @ and can be written whether or not the L2 cache is enabled ldr r0, [r1, #L2X0_CACHE_ID] @@ -51,6 +60,7 @@ ENTRY(l2c310_early_resume) str r2, [r1, #L2X0_AUX_CTRL] mov r9, #L2X0_CTRL_EN +ARM_BE8(rev r9, r9) str r9, [r1, #L2X0_CTRL] ret lr ENDPROC(l2c310_early_resume)