From patchwork Sat Feb 7 12:39:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Jarzmik X-Patchwork-Id: 5796151 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B03AA9FB04 for ; Sat, 7 Feb 2015 12:43:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E215320154 for ; Sat, 7 Feb 2015 12:43:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E656F201B9 for ; Sat, 7 Feb 2015 12:43:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YK4gh-0005Yr-QX; Sat, 07 Feb 2015 12:40:39 +0000 Received: from smtp03.smtpout.orange.fr ([80.12.242.125] helo=smtp.smtpout.orange.fr) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YK4gG-0004DH-Ke for linux-arm-kernel@lists.infradead.org; Sat, 07 Feb 2015 12:40:14 +0000 Received: from beldin.home ([92.136.77.170]) by mwinf5d50 with ME id pQfi1p00G3gTorg03QfpET; Sat, 07 Feb 2015 13:39:49 +0100 X-ME-Helo: beldin.home X-ME-Date: Sat, 07 Feb 2015 13:39:49 +0100 X-ME-IP: 92.136.77.170 From: Robert Jarzmik To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Dmitry Eremin-Solenikov , Sergei Shtylyov Subject: [PATCH v3 2/5] ARM: dts: pxa: add clocks Date: Sat, 7 Feb 2015 13:39:17 +0100 Message-Id: <1423312760-15871-2-git-send-email-robert.jarzmik@free.fr> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1423312760-15871-1-git-send-email-robert.jarzmik@free.fr> References: <1423312760-15871-1-git-send-email-robert.jarzmik@free.fr> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150207_044013_029743_3242427E X-CRM114-Status: UNSURE ( 7.86 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) Cc: devicetree@vger.kernel.org, Robert Jarzmik , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add clocks to the IPs already described in the pxa device-tree files. There are more clocks in the clock tree than IPs described in the current pxa device-tree. This patch ensures that : - the current description is correct - the clocks are actually claimed, so that clock framework doesn't disable them automatically (unused clocks shutdown) Signed-off-by: Robert Jarzmik --- arch/arm/boot/dts/pxa27x.dtsi | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi index 98b560e..e8d5097 100644 --- a/arch/arm/boot/dts/pxa27x.dtsi +++ b/arch/arm/boot/dts/pxa27x.dtsi @@ -1,6 +1,6 @@ /* The pxa3xx skeleton simply augments the 2xx version */ #include "pxa2xx.dtsi" -#include "dt-bindings/clock/pxa2xx-clock.h" +#include "dt-bindings/clock/pxa-clock.h" / { model = "Marvell PXA27x familiy SoC"; @@ -12,36 +12,62 @@ marvell,intc-nr-irqs = <34>; }; + gpio: gpio@40e00000 { + compatible = "intel,pxa27x-gpio"; + clocks = <&pxa2xx_clks CLK_NONE>; + }; + + ffuart: uart@40100000 { + clocks = <&pxa2xx_clks CLK_FFUART>; + }; + + btuart: uart@40200000 { + clocks = <&pxa2xx_clks CLK_BTUART>; + }; + + stuart: uart@40700000 { + clocks = <&pxa2xx_clks CLK_STUART>; + }; + pwm0: pwm@40b00000 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40b00000 0x10>; #pwm-cells = <1>; + clocks = <&pxa2xx_clks CLK_PWM0>; }; pwm1: pwm@40b00010 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40b00010 0x10>; #pwm-cells = <1>; + clocks = <&pxa2xx_clks CLK_PWM1>; }; pwm2: pwm@40c00000 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40c00000 0x10>; #pwm-cells = <1>; + clocks = <&pxa2xx_clks CLK_PWM0>; }; pwm3: pwm@40c00010 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40c00010 0x10>; #pwm-cells = <1>; + clocks = <&pxa2xx_clks CLK_PWM1>; }; pwri2c: i2c@40f000180 { compatible = "mrvl,pxa-i2c"; reg = <0x40f00180 0x24>; interrupts = <6>; + clocks = <&pxa2xx_clks CLK_PWRI2C>; status = "disabled"; }; + + pxai2c1: i2c@40301680 { + clocks = <&pxa2xx_clks CLK_I2C>; + }; }; clocks { @@ -54,10 +80,9 @@ ranges; pxa2xx_clks: pxa2xx_clks@41300004 { - compatible = "marvell,pxa-clocks"; + compatible = "marvell,pxa270-clocks"; #clock-cells = <1>; status = "okay"; }; }; - };