From patchwork Mon Feb 9 11:02:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kachhap X-Patchwork-Id: 5800871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CD6079F336 for ; Mon, 9 Feb 2015 11:07:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DB49B20120 for ; Mon, 9 Feb 2015 11:07:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C64EE2011D for ; Mon, 9 Feb 2015 11:07:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YKm8u-0001o7-RG; Mon, 09 Feb 2015 11:04:40 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YKm54-0007f4-9Q for linux-arm-kernel@lists.infradead.org; Mon, 09 Feb 2015 11:00:44 +0000 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NJI00HFB3W9UR00@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 09 Feb 2015 20:00:09 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.125]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 21.B6.11124.93398D45; Mon, 09 Feb 2015 20:00:09 +0900 (KST) X-AuditID: cbfee68e-f79b46d000002b74-fe-54d89339d6fa Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 83.20.20081.83398D45; Mon, 09 Feb 2015 20:00:09 +0900 (KST) Received: from chromebld-server.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NJI00CJM3R5TO30@mmp1.samsung.com>; Mon, 09 Feb 2015 20:00:08 +0900 (KST) From: Amit Daniel Kachhap To: linux-pm@vger.kernel.org Subject: [PATCH RFC v4 3/3] clk: samsung: Add PM runtime support for clocks. Date: Mon, 09 Feb 2015 16:32:06 +0530 Message-id: <1423479726-23140-4-git-send-email-amit.daniel@samsung.com> X-Mailer: git-send-email 2.2.0 In-reply-to: <1423479726-23140-1-git-send-email-amit.daniel@samsung.com> References: <1423479726-23140-1-git-send-email-amit.daniel@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprMIsWRmVeSWpSXmKPExsWyRsSkVtdy8o0Qgycf+S0aroZYzJ09idGi d8FVNouvh1cwWsyaspfJYtPja6wWl3fNYbP43HuE0WLG+X1MFmuP3GW3WLT1C7vFmdOXWC0O v2lntehYxmixatcfRovja8MdBDwmntX12DnrLrvH4j0vmTzuXNvD5rF5Sb3HlqvtLB59W1Yx enzeJBfAEcVlk5Kak1mWWqRvl8CVsb0voeCTWsWTK9MZGxhvK3QxcnJICJhIbP5+mwnCFpO4 cG89WxcjF4eQwFJGiVu/p7HAFL1ZuY0ZIrGIUWJZ/zwmCGcCk8SN/51gVWwCxhI/d+5nB7FF BGQkpl7ZzwpSxCywgFni6KTFYEXCAj4SG+93gNksAqoSm6/eZgWxeQXcJXZ8W8oKsU5OYsut R2CDOAU8JGacbgOzhYBqOk4tYAQZKiHwll2i/9YNRohBAhLfJh8CGsoBlJCV2HSAGWKOpMTB FTdYJjAKL2BkWMUomlqQXFCclF5kpFecmFtcmpeul5yfu4kRGFen/z3r28F484D1IUYBDkYl Ht4Ln6+HCLEmlhVX5h5iNAXaMJFZSjQ5Hxi9eSXxhsZmRhamJqbGRuaWZkrivAlSP4OFBNIT S1KzU1MLUovii0pzUosPMTJxcEo1MKavfK208MM8t46AT9vWbFGRCcvzO25yVdR8lmBoAsNr O/YCxYepAqFdj5O+zitk/S5XcXlLQ+3uq9G6tk/M3BdlsmW5/rw0v1ZnCv+15stXllw+17Ot oXt1o5yeU9zDIx+EV/6wCloY19DzQU/v3JNUE/msn0d1L2Xs3PtlU+sMU0+L363XNZRYijMS DbWYi4oTAds6qdumAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLIsWRmVeSWpSXmKPExsVy+t9jAV3LyTdCDL7MYbNouBpiMXf2JEaL 3gVX2Sy+Hl7BaDFryl4mi02Pr7FaXN4FVPG59wijxYzz+5gs1h65y26xaOsXdoszpy+xWhx+ 085q0bGM0WLVrj+MFsfXhjsIeEw8q+uxc9Zddo/Fe14yedy5tofNY/OSeo8tV9tZPPq2rGL0 +LxJLoAjqoHRJiM1MSW1SCE1Lzk/JTMv3VbJOzjeOd7UzMBQ19DSwlxJIS8xN9VWycUnQNct MwfofCWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFBcD1GBmggYQ1jxva+hIJPahVPrkxn bGC8rdDFyMkhIWAi8WblNmYIW0ziwr31bF2MXBxCAosYJZb1z2OCcCYwSdz438kCUsUmYCzx c+d+dhBbREBGYuqV/awgRcwCC5gljk5aDFYkLOAjsfF+B5jNIqAqsfnqbVYQm1fAXWLHt6Ws EOvkJLbcegQ2iFPAQ2LG6TYwWwiopuPUAsYJjLwLGBlWMYqmFiQXFCel5xrqFSfmFpfmpesl 5+duYgRH7TOpHYwrGywOMQpwMCrx8F78fD1EiDWxrLgy9xCjBAezkgjv/p4bIUK8KYmVValF +fFFpTmpxYcYTYGumsgsJZqcD0woeSXxhsYm5qbGppYmFiZmlkrivEr2bSFCAumJJanZqakF qUUwfUwcnFINjLH8x37w/2Z9t+/p/1mL/3UaH5l65O/KlJ+Oen1+vrfPf+L61H1ki6Xl0yuP 32vP5t2iW87u9Pw5566gNxFpZ6rP/94XdiQs4C/7Wq/7/MfO8ZUeOPJ1+8p76nNDmgpYQ97f 23W461PjPK05PVWPA2pa7WcJebopxCt9sfrRHb67dFLd26XSPpuUWIozEg21mIuKEwHFtJ2M 8AIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150209_030042_575159_40767823 X-CRM114-Status: GOOD ( 14.14 ) X-Spam-Score: -5.0 (-----) Cc: len.brown@intel.com, ulf.hansson@linaro.org, khilman@linaro.org, geert+renesas@glider.be, pankaj.dubey@samsung.com, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, tomasz.figa@gmail.com, Amit Daniel Kachhap , linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, s.nawrocki@samsung.com, kgene.kim@samsung.com, linux-arm-kernel@lists.infradead.org, m.szyprowski@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds PM runtime support for clocks associated with Power Domain. The PM runtime suspend/resume handlers will be called when the power domain associated with it, is turned on/off. The registration of clocks happen in early initailisation. The probe is later called to register the clock device with the power domain. Signed-off-by: Amit Daniel Kachhap --- drivers/clk/samsung/clk.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/samsung/clk.h | 11 ++++++ 2 files changed, 104 insertions(+) diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index 4bda540..0b5c82a 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -12,6 +12,9 @@ */ #include +#include +#include +#include #include #include "clk.h" @@ -370,6 +373,92 @@ static void samsung_clk_sleep_init(void __iomem *reg_base, unsigned long nr_rdump) {} #endif +static int samsung_cmu_runtime_suspend(struct device *dev) +{ + struct samsung_clock_pd_reg_cache *reg_cache; + + reg_cache = dev_get_drvdata(dev); + samsung_clk_save(reg_cache->reg_base, reg_cache->rdump, + reg_cache->rd_num); + return 0; +} + +static int samsung_cmu_runtime_resume(struct device *dev) +{ + struct samsung_clock_pd_reg_cache *reg_cache; + + reg_cache = dev_get_drvdata(dev); + samsung_clk_restore(reg_cache->reg_base, reg_cache->rdump, + reg_cache->rd_num); + return 0; +} + +#define MAX_CMU_DEVICE_MATCH 50 +static int samsung_cmu_count; +static struct of_device_id samsung_cmu_match[MAX_CMU_DEVICE_MATCH]; +MODULE_DEVICE_TABLE(of, samsung_cmu_match); + +static void samsung_clk_pd_init(struct device_node *np, void __iomem *reg_base, + struct samsung_cmu_info *cmu) +{ + struct samsung_clock_pd_reg_cache *pd_reg_cache; + const char *name; + + if (samsung_cmu_count == MAX_CMU_DEVICE_MATCH) + panic("Maximum clock device limit reached.\n"); + + if (of_property_read_string_index(np, "compatible", 0, &name)) + panic("Invalid DT node.\n"); + + pd_reg_cache = kzalloc(sizeof(struct samsung_clock_pd_reg_cache), + GFP_KERNEL); + if (!pd_reg_cache) + panic("Could not allocate register reg_cache.\n"); + + pd_reg_cache->rdump = samsung_clk_alloc_reg_dump(cmu->pd_clk_regs, + cmu->nr_pd_clk_regs); + if (!pd_reg_cache->rdump) + panic("Could not allocate register dump storage.\n"); + + pd_reg_cache->reg_base = reg_base; + pd_reg_cache->rd_num = cmu->nr_pd_clk_regs; + + /* Fill up the compatible string and data */ + samsung_cmu_match[samsung_cmu_count].data = pd_reg_cache; + strcpy(samsung_cmu_match[samsung_cmu_count].compatible, name); + samsung_cmu_count++; +} + +static int __init samsung_cmu_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct of_device_id *match; + + /* get the platform data */ + match = (struct of_device_id *)of_match_node(samsung_cmu_match, + pdev->dev.of_node); + if (!match) + return 0; + platform_set_drvdata(pdev, (void *)match->data); + pm_runtime_enable(dev); + pm_runtime_set_slave(dev); + return 0; +} + +static const struct dev_pm_ops samsung_cmu_pm_ops = { + SET_RUNTIME_PM_OPS(samsung_cmu_runtime_suspend, + samsung_cmu_runtime_resume, NULL) +}; + +static struct platform_driver samsung_cmu_driver = { + .driver = { + .name = "exynos-clk", + .of_match_table = samsung_cmu_match, + .pm = &samsung_cmu_pm_ops, + }, + .probe = samsung_cmu_probe, +}; + /* * Common function which registers plls, muxes, dividers and gates * for each CMU. It also add CMU register list to register cache. @@ -409,5 +498,9 @@ void __init samsung_cmu_register_one(struct device_node *np, samsung_clk_sleep_init(reg_base, cmu->clk_regs, cmu->nr_clk_regs); + if (cmu->pd_clk_regs) + samsung_clk_pd_init(np, reg_base, cmu); + samsung_clk_of_add_provider(np, ctx); } +module_platform_driver(samsung_cmu_driver); diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index 8acabe1..7565be8 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -327,6 +327,12 @@ struct samsung_clock_reg_cache { unsigned int rd_num; }; +struct samsung_clock_pd_reg_cache { + void __iomem *reg_base; + struct samsung_clk_reg_dump *rdump; + unsigned int rd_num; +}; + struct samsung_cmu_info { /* list of pll clocks and respective count */ struct samsung_pll_clock *pll_clks; @@ -352,6 +358,11 @@ struct samsung_cmu_info { /* list and number of clocks registers */ unsigned long *clk_regs; unsigned int nr_clk_regs; + + /* list and number of clocks to be saved/restored during + * power domain shutdown */ + unsigned long *pd_clk_regs; + unsigned int nr_pd_clk_regs; }; extern struct samsung_clk_provider *__init samsung_clk_init(