From patchwork Fri Feb 20 18:01:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Coquelin X-Patchwork-Id: 5857901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 383F8BF440 for ; Fri, 20 Feb 2015 18:06:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6654720465 for ; Fri, 20 Feb 2015 18:06:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 842A120504 for ; Fri, 20 Feb 2015 18:06:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YOrvr-00036O-TI; Fri, 20 Feb 2015 18:04:07 +0000 Received: from mail-wi0-x244.google.com ([2a00:1450:400c:c05::244]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YOrtr-0002De-Lz for linux-arm-kernel@lists.infradead.org; Fri, 20 Feb 2015 18:02:04 +0000 Received: by mail-wi0-f196.google.com with SMTP id em10so1757547wid.3 for ; Fri, 20 Feb 2015 10:01:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=5d+NTX2mUVhpgjiuasm1SGKG1wZDlgYBxx0o/Sjwe24=; b=kEHawvSM995NKa/U6cXsURcwVguAJFjqsxxiU5Xxpb63GAePEKIazZ56CX6fQIn9Q9 MckZXkDPTUKkbuhbBVHArQqPVT/oeiMCto4aVZdcvN/f+1ZilZen6XCZAMZgt3vJ4PcX n92hFvL380wbIJhRUxvCo8kLeiL65MrQOI6AuzsskBNqG0XF3IFW30hfVktmU5aJuPO0 mxSnu9pw/SOQPu0Jj+eYK3EzBiYSypdRp1AXZ8yxIrB71fDdsSJH4BJ40CF+wHySJEyP ZumVtD7gx4JnaWWEWL7TW0RJJC3j31gVdAadORvH/THwShjzN3KXZm4L3pxQ4W8luvPK 2O5g== X-Received: by 10.180.208.74 with SMTP id mc10mr135194wic.38.1424455300007; Fri, 20 Feb 2015 10:01:40 -0800 (PST) Received: from lmecul0520.st.com. (169.20.90.92.rev.sfr.net. [92.90.20.169]) by mx.google.com with ESMTPSA id hs7sm3398370wib.4.2015.02.20.10.01.37 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Feb 2015 10:01:39 -0800 (PST) From: Maxime Coquelin To: u.kleine-koenig@pengutronix.de, afaerber@suse.de, geert@linux-m68k.org, Rob Herring , Philipp Zabel , Jonathan Corbet , Maxime Coquelin , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Daniel Lezcano , Thomas Gleixner , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org Subject: [PATCH v2 04/18] clocksource: Add ARM System timer driver Date: Fri, 20 Feb 2015 19:01:03 +0100 Message-Id: <1424455277-29983-5-git-send-email-mcoquelin.stm32@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424455277-29983-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1424455277-29983-1-git-send-email-mcoquelin.stm32@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150220_100203_905023_4C380665 X-CRM114-Status: GOOD ( 15.21 ) X-Spam-Score: 3.0 (+++) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SBL_CSS, RP_MATCHES_RCVD, T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds clocksource support for ARMv7-M's System timer, also known as SysTick. Signed-off-by: Maxime Coquelin --- drivers/clocksource/Kconfig | 7 ++++ drivers/clocksource/Makefile | 1 + drivers/clocksource/armv7m_systick.c | 78 ++++++++++++++++++++++++++++++++++++ 3 files changed, 86 insertions(+) create mode 100644 drivers/clocksource/armv7m_systick.c diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index fc01ec2..fb6011e 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -124,6 +124,13 @@ config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK help Use ARM global timer clock source as sched_clock +config ARMV7M_SYSTICK + bool + select CLKSRC_OF if OF + select CLKSRC_MMIO + help + This options enables support for the ARMv7M system timer unit + config ATMEL_PIT select CLKSRC_OF if OF def_bool SOC_AT91SAM9 || SOC_SAMA5 diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 94d90b2..eeea736 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_MTK_TIMER) += mtk_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o +obj-$(CONFIG_ARMV7M_SYSTICK) += armv7m_systick.o obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST) += dummy_timer.o obj-$(CONFIG_ARCH_KEYSTONE) += timer-keystone.o diff --git a/drivers/clocksource/armv7m_systick.c b/drivers/clocksource/armv7m_systick.c new file mode 100644 index 0000000..23d8249 --- /dev/null +++ b/drivers/clocksource/armv7m_systick.c @@ -0,0 +1,78 @@ +/* + * Copyright (C) Maxime Coquelin 2015 + * Author: Maxime Coquelin + * License terms: GNU General Public License (GPL), version 2 + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SYST_CSR 0x00 +#define SYST_RVR 0x04 +#define SYST_CVR 0x08 +#define SYST_CALIB 0x0c + +#define SYST_CSR_ENABLE BIT(0) + +#define SYSTICK_LOAD_RELOAD_MASK 0x00FFFFFF + +static void __init system_timer_of_register(struct device_node *np) +{ + struct clk *clk; + void __iomem *base; + u32 rate = 0; + int ret; + + base = of_iomap(np, 0); + if (!base) { + pr_warn("system-timer: invalid base address\n"); + return; + } + + clk = of_clk_get(np, 0); + if (!IS_ERR(clk)) { + ret = clk_prepare_enable(clk); + if (ret) { + clk_put(clk); + goto out_unmap; + } + + rate = clk_get_rate(clk); + } + + /* If no clock found, try to get clock-frequency property */ + if (!rate) { + ret = of_property_read_u32(np, "clock-frequency", &rate); + if (ret) + goto out_unmap; + } + + writel_relaxed(SYSTICK_LOAD_RELOAD_MASK, base + SYST_RVR); + writel_relaxed(SYST_CSR_ENABLE, base + SYST_CSR); + + ret = clocksource_mmio_init(base + SYST_CVR, "arm_system_timer", rate, + 200, 24, clocksource_mmio_readl_down); + if (ret) { + pr_err("failed to init clocksource (%d)\n", ret); + goto out_clk_disable; + } + + pr_info("ARM System timer initialized as clocksource\n"); + + return; + +out_clk_disable: + if (!IS_ERR(clk)) + clk_disable_unprepare(clk); +out_unmap: + iounmap(base); + WARN(ret, "ARM System timer register failed (%d)\n", ret); +} + +CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick", + system_timer_of_register);