@@ -192,6 +192,7 @@
clocks = <&clock_peric0 PCLK_UART0>,
<&clock_peric0 SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
+ samsung,uart-fifosize = <64>;
status = "disabled";
};
@@ -202,6 +203,7 @@
clocks = <&clock_peric1 PCLK_UART1>,
<&clock_peric1 SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
+ samsung,uart-fifosize = <256>;
status = "disabled";
};
@@ -212,6 +214,7 @@
clocks = <&clock_peric1 PCLK_UART2>,
<&clock_peric1 SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
+ samsung,uart-fifosize = <16>;
status = "disabled";
};
@@ -222,6 +225,7 @@
clocks = <&clock_peric1 PCLK_UART3>,
<&clock_peric1 SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
+ samsung,uart-fifosize = <64>;
status = "disabled";
};
Specify the fifo sizes of the 4 uart channels on exynos7 via dt. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> --- arch/arm64/boot/dts/exynos/exynos7.dtsi | 4 ++++ 1 file changed, 4 insertions(+)