From patchwork Mon Mar 2 23:30:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 5918241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0BCD2BF440 for ; Mon, 2 Mar 2015 23:33:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 24E0B20212 for ; Mon, 2 Mar 2015 23:33:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 33DA620225 for ; Mon, 2 Mar 2015 23:33:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YSZo3-0002K8-DS; Mon, 02 Mar 2015 23:31:23 +0000 Received: from mail-pd0-f180.google.com ([209.85.192.180]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YSZnl-00026t-F9 for linux-arm-kernel@lists.infradead.org; Mon, 02 Mar 2015 23:31:06 +0000 Received: by pdbfl12 with SMTP id fl12so12176306pdb.5 for ; Mon, 02 Mar 2015 15:30:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6PIpRJeU7fG0KnaAk/594Bu3KSLOuVitqc4iO8zfZhA=; b=HpBaJ1+mIwlJ5OZPugBLTJcy0ZWNFlF62OQ7exr9yaYojVWoTuHj5KI9iybd5iiplM 1j6nJOXgF3hdtGoVmh1GMaGKEjE8Dn0zCo/KTbzKxaGvhpgSTNDKedTk529UwFDrKpm5 W+TfU+wUNGi0IOqyiNj8OKbiEBkdUEYCgfiP1XhAGpIFnAnkw7u7lerbOJEd7sq8X/Qk d8ZSW2d5O94HngNU6O5RDvFL8xVUgipiY/kNBSS9Nrua4wPYZlRl95caBzahw/IsfbQ2 kGrAD9hZwOTcNj/wUHq/7+u2LJI5gd3E7WLUFn0ygyUEP8eMVYB76RP59havcADHedsH AvsQ== X-Gm-Message-State: ALoCoQl48zoYULw6L14HlOQk/jl4UxSaCqD7brPRJmBN1j7NUDbj7FhhjzJhShuMP0HuOBxI3QDQ X-Received: by 10.70.98.239 with SMTP id el15mr50334437pdb.133.1425339044295; Mon, 02 Mar 2015 15:30:44 -0800 (PST) Received: from ubuntu.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by mx.google.com with ESMTPSA id f8sm13014000pdm.68.2015.03.02.15.30.42 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 Mar 2015 15:30:43 -0800 (PST) From: Lina Iyer To: sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, agross@codeaurora.org Subject: [PATCH v4 1/3] firmware: qcom: scm: Clean cold boot entry to export only the API Date: Mon, 2 Mar 2015 16:30:28 -0700 Message-Id: <1425339030-45828-2-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1425339030-45828-1-git-send-email-lina.iyer@linaro.org> References: <1425339030-45828-1-git-send-email-lina.iyer@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150302_153105_570985_3B22555F X-CRM114-Status: GOOD ( 14.73 ) X-Spam-Score: -0.7 (/) Cc: khilman@linaro.org, Lina Iyer , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We dont need to export the SCM specific cold boot flags to the platform code. Export only a function to set the cold boot address. Signed-off-by: Lina Iyer --- arch/arm/mach-qcom/platsmp.c | 21 +++------------------ drivers/firmware/qcom_scm.c | 41 +++++++++++++++++++++++++++++++++++++++-- include/linux/qcom_scm.h | 5 +---- 3 files changed, 43 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c index 4b67e56..5cde63a 100644 --- a/arch/arm/mach-qcom/platsmp.c +++ b/arch/arm/mach-qcom/platsmp.c @@ -319,25 +319,10 @@ static int kpssv2_boot_secondary(unsigned int cpu, struct task_struct *idle) static void __init qcom_smp_prepare_cpus(unsigned int max_cpus) { - int cpu, map; - unsigned int flags = 0; - static const int cold_boot_flags[] = { - 0, - QCOM_SCM_FLAG_COLDBOOT_CPU1, - QCOM_SCM_FLAG_COLDBOOT_CPU2, - QCOM_SCM_FLAG_COLDBOOT_CPU3, - }; - - for_each_present_cpu(cpu) { - map = cpu_logical_map(cpu); - if (WARN_ON(map >= ARRAY_SIZE(cold_boot_flags))) { - set_cpu_present(cpu, false); - continue; - } - flags |= cold_boot_flags[map]; - } + int cpu; - if (qcom_scm_set_boot_addr(virt_to_phys(secondary_startup_arm), flags)) { + if (qcom_scm_set_cold_boot_addr(secondary_startup_arm, + cpu_present_mask)) { for_each_present_cpu(cpu) { if (cpu == smp_processor_id()) continue; diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 6e7a72b..c953cc3 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -34,6 +34,11 @@ #define QCOM_SCM_ERROR -1 #define QCOM_SCM_INTERRUPTED 1 +#define QCOM_SCM_FLAG_COLDBOOT_CPU0 0x00 +#define QCOM_SCM_FLAG_COLDBOOT_CPU1 0x01 +#define QCOM_SCM_FLAG_COLDBOOT_CPU2 0x08 +#define QCOM_SCM_FLAG_COLDBOOT_CPU3 0x20 + static DEFINE_MUTEX(qcom_scm_lock); /** @@ -329,7 +334,7 @@ EXPORT_SYMBOL(qcom_scm_get_version); /* * Set the cold/warm boot address for one of the CPU cores. */ -int qcom_scm_set_boot_addr(u32 addr, int flags) +static int qcom_scm_set_boot_addr(u32 addr, int flags) { struct { __le32 flags; @@ -341,4 +346,36 @@ int qcom_scm_set_boot_addr(u32 addr, int flags) return qcom_scm_call(QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR, &cmd, sizeof(cmd), NULL, 0); } -EXPORT_SYMBOL(qcom_scm_set_boot_addr); + +/** + * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus + * @entry: Entry point function for the cpus + * @cpus: The cpumask of cpus that will use the entry point + * + * Set the cold boot address of the cpus. Any cpu outside the supported + * range would be removed from the cpu present mask. + */ +int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) +{ + int flags = 0; + int cpu; + int scm_cb_flags[] = { + QCOM_SCM_FLAG_COLDBOOT_CPU0, + QCOM_SCM_FLAG_COLDBOOT_CPU1, + QCOM_SCM_FLAG_COLDBOOT_CPU2, + QCOM_SCM_FLAG_COLDBOOT_CPU3, + }; + + if (!cpus || (cpus && cpumask_empty(cpus))) + return -EINVAL; + + for_each_cpu(cpu, cpus) { + if (cpu < ARRAY_SIZE(scm_cb_flags)) + flags |= scm_cb_flags[cpu]; + else + set_cpu_present(cpu, false); + } + + return qcom_scm_set_boot_addr(virt_to_phys(entry), flags); +} +EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr); diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index 6bb84cf..68a1d88 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -12,15 +12,12 @@ #ifndef __QCOM_SCM_H #define __QCOM_SCM_H -#define QCOM_SCM_FLAG_COLDBOOT_CPU1 0x01 -#define QCOM_SCM_FLAG_COLDBOOT_CPU2 0x08 -#define QCOM_SCM_FLAG_COLDBOOT_CPU3 0x20 #define QCOM_SCM_FLAG_WARMBOOT_CPU0 0x04 #define QCOM_SCM_FLAG_WARMBOOT_CPU1 0x02 #define QCOM_SCM_FLAG_WARMBOOT_CPU2 0x10 #define QCOM_SCM_FLAG_WARMBOOT_CPU3 0x40 -extern int qcom_scm_set_boot_addr(u32 addr, int flags); +extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); #define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))