From patchwork Tue Mar 17 21:51:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 6034731 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 717EA9F318 for ; Tue, 17 Mar 2015 21:54:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BD6A20489 for ; Tue, 17 Mar 2015 21:54:45 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C20232046F for ; Tue, 17 Mar 2015 21:54:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YXzQ0-0005fx-1Y; Tue, 17 Mar 2015 21:52:56 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YXzOu-000585-6j for linux-arm-kernel@lists.infradead.org; Tue, 17 Mar 2015 21:51:51 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 787941408A9; Tue, 17 Mar 2015 21:51:31 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 6689F1408AD; Tue, 17 Mar 2015 21:51:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: agross@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 418FF1408AA; Tue, 17 Mar 2015 21:51:30 +0000 (UTC) From: Andy Gross To: Kumar Gala Subject: [PATCH 3/4] ARM: DT: msm8660: Add ADM device nodes Date: Tue, 17 Mar 2015 16:51:10 -0500 Message-Id: <1426629071-3541-4-git-send-email-agross@codeaurora.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1426629071-3541-1-git-send-email-agross@codeaurora.org> References: <1426629071-3541-1-git-send-email-agross@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150317_145148_371956_2BF19851 X-CRM114-Status: GOOD ( 11.68 ) X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, Andy Gross , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for the ADM DMA on the MSM8660 SOC Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-msm8660.dtsi | 42 +++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 0affd61..8043c12 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -4,7 +4,9 @@ #include #include +#include #include +#include / { model = "Qualcomm MSM8660"; @@ -196,6 +198,46 @@ vmmc-supply = <&vsdcc_fixed>; }; }; + + adm_dma0: dma@18320000 { + compatible = "qcom,adm"; + reg = <0x18320000 0x100000>; + interrupts = ; + #dma-cells = <1>; + + clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; + clock-names = "core", "iface"; + + resets = <&gcc ADM0_RESET>, + <&gcc ADM0_PBUS_RESET>, + <&gcc ADM0_C0_RESET>, + <&gcc ADM0_C1_RESET>, + <&gcc ADM0_C2_RESET>; + reset-names = "clk", "pbus", "c0", "c1", "c2"; + qcom,ee = <1>; + + status = "disabled"; + }; + + adm_dma1: dma@18420000 { + compatible = "qcom,adm"; + reg = <0x18420000 0xE0000>; + interrupts = ; + #dma-cells = <1>; + + clocks = <&gcc ADM1_CLK>, <&gcc ADM1_PBUS_CLK>; + clock-names = "core", "iface"; + + resets = <&gcc ADM1_RESET>, + <&gcc ADM1_PBUS_RESET>, + <&gcc ADM1_C0_RESET>, + <&gcc ADM1_C1_RESET>, + <&gcc ADM1_C2_RESET>; + reset-names = "clk", "pbus", "c0", "c1", "c2"; + qcom,ee = <1>; + + status = "disabled"; + }; }; };