From patchwork Wed Mar 18 16:00:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 6041661 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4EDF0BF90F for ; Wed, 18 Mar 2015 16:21:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4ABA820450 for ; Wed, 18 Mar 2015 16:21:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 56BC3203DF for ; Wed, 18 Mar 2015 16:21:21 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YYGfz-0003Sq-1r; Wed, 18 Mar 2015 16:18:35 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YYGPV-0004l3-49 for linux-arm-kernel@lists.infradead.org; Wed, 18 Mar 2015 16:01:37 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NLF00CXO0I164C0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 19 Mar 2015 01:01:13 +0900 (KST) X-AuditID: cbfee61b-f79d76d0000024d6-59-5509a14937ec Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id D8.FD.09430.941A9055; Thu, 19 Mar 2015 01:01:13 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NLF00H420HIA880@mmp1.samsung.com>; Thu, 19 Mar 2015 01:01:13 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Kukjin Kim , Kukjin Kim Subject: [PATCH v4 3/4] ARM: EXYNOS: cpuidle: add AFTR mode support for Exynos3250 Date: Wed, 18 Mar 2015 17:00:52 +0100 Message-id: <1426694453-3242-4-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1426694453-3242-1-git-send-email-b.zolnierkie@samsung.com> References: <1426694453-3242-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKLMWRmVeSWpSXmKPExsVy+t9jAV3PhZyhBvcaJSw2zljPajHvs6xF 74KrbBb9j18zW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi1W7/jA6cHnsnHWX3WPTqk42 jzvX9rB5bF5S79G3ZRWjx+dNcgFsUVw2Kak5mWWpRfp2CVwZa/avYyt4pljRsO42UwNjg0wX IyeHhICJxP1ry9kgbDGJC/fWA9lcHEICixglZjauYwZJCAl0MUncbDEHsdkErCQmtq9iBLFF BFwl5lyZxAjSwCywkEli1tsn7CAJYYEQidMf77KC2CwCqhJf5v0EKuLg4BVwl5jySABimaJE 97MJYIs5BTwkPm7cyg6xC6jkxQX2CYy8CxgZVjGKphYkFxQnpeca6RUn5haX5qXrJefnbmIE B94z6R2MqxosDjEKcDAq8fBKXOUIFWJNLCuuzD3EKMHBrCTCe2MWZ6gQb0piZVVqUX58UWlO avEhRmkOFiVxXiX7thAhgfTEktTs1NSC1CKYLBMHp1QD45YiU6kFLicFgxcGSW/urGnrmts0 IWves+gKFdEvHo8tjP+u8I+QCIxx9ExnnM/vfnDmEuefPikfBP9+fbKroj591hyXIhmnYy5z dk78Hb1p4QlfFvY86XXbd+yNmupQss7iCbNA/zO9w+a9irwRK6Kc+i6bdQfMUAjO+3/6wILr K9WTlPSvKLEUZyQaajEXFScCADI2zS84AgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150318_090133_559654_55AA3EA8 X-CRM114-Status: GOOD ( 15.59 ) X-Spam-Score: -5.0 (-----) Cc: linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, Daniel Lezcano , Tomasz Figa , linux-kernel@vger.kernel.org, Kyungmin Park , linux-arm-kernel@lists.infradead.org, b.zolnierkie@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP AFTR mode support brings reduced energy consumption and is a prerequisite for more advanced W-AFTR/LPA power saving modes. AFTR mode has been already supported on other Exynos SoCs for few years and this patch adds its support for Exynos3250 SoC. The differences in Exynos3250 SoC AFTR mode support when compared to Exynos4x12 SoCs are: - different secure firmware calls are used - different S5P_WAKEUP_MASK wakeup mask is used - S5P_WAKEUP_MASK2 wakeup mask needs to be set in addition to the standard S5P_WAKEUP_MASK one - C2_STATE BOOT mode flag needs to be set/cleared pre/post AFTR Cc: Daniel Lezcano Signed-off-by: Bartlomiej Zolnierkiewicz Acked-by: Kyungmin Park --- arch/arm/mach-exynos/firmware.c | 8 +++++++- arch/arm/mach-exynos/pm.c | 12 +++++++++++- arch/arm/mach-exynos/regs-pmu.h | 1 + arch/arm/mach-exynos/smc.h | 9 +++++++++ 4 files changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index 27b8ae3..1bd3576 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -48,7 +48,13 @@ static int exynos_do_idle(unsigned long mode) __raw_writel(virt_to_phys(exynos_cpu_resume_ns), sysram_ns_base_addr + 0x24); __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); - exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); + if (soc_is_exynos3250()) { + exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE, + SMC_POWERSTATE_IDLE, 0); + exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER, + SMC_POWERSTATE_IDLE, 0); + } else + exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); break; case FW_DO_IDLE_SLEEP: exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 5685250..cc75ab4 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -127,6 +127,8 @@ int exynos_pm_central_resume(void) static void exynos_set_wakeupmask(long mask) { pmu_raw_writel(mask, S5P_WAKEUP_MASK); + if (soc_is_exynos3250()) + pmu_raw_writel(0x0, S5P_WAKEUP_MASK2); } static void exynos_cpu_set_boot_vector(long flags) @@ -140,7 +142,7 @@ static int exynos_aftr_finisher(unsigned long flags) { int ret; - exynos_set_wakeupmask(0x0000ff3e); + exynos_set_wakeupmask(soc_is_exynos3250() ? 0x40003ffe : 0x0000ff3e); /* Set value of power down register for aftr mode */ exynos_sys_powerdown_conf(SYS_AFTR); @@ -157,8 +159,13 @@ static int exynos_aftr_finisher(unsigned long flags) void exynos_enter_aftr(void) { + unsigned int cpuid = smp_processor_id(); + cpu_pm_enter(); + if (soc_is_exynos3250()) + exynos_set_boot_flag(cpuid, C2_STATE); + exynos_pm_central_suspend(); if (of_machine_is_compatible("samsung,exynos4212") || @@ -178,6 +185,9 @@ void exynos_enter_aftr(void) exynos_pm_central_resume(); + if (soc_is_exynos3250()) + exynos_clear_boot_flag(cpuid, C2_STATE); + cpu_pm_exit(); } diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 84ddce1..b761433 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -43,6 +43,7 @@ #define S5P_WAKEUP_STAT 0x0600 #define S5P_EINT_WAKEUP_MASK 0x0604 #define S5P_WAKEUP_MASK 0x0608 +#define S5P_WAKEUP_MASK2 0x0614 #define S5P_INFORM0 0x0800 #define S5P_INFORM1 0x0804 diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h index f7b82f9..94180ba 100644 --- a/arch/arm/mach-exynos/smc.h +++ b/arch/arm/mach-exynos/smc.h @@ -17,6 +17,8 @@ #define SMC_CMD_SLEEP (-3) #define SMC_CMD_CPU1BOOT (-4) #define SMC_CMD_CPU0AFTR (-5) +#define SMC_CMD_SAVE (-6) +#define SMC_CMD_SHUTDOWN (-7) /* For CP15 Access */ #define SMC_CMD_C15RESUME (-11) /* For L2 Cache Access */ @@ -32,4 +34,11 @@ extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3); #endif /* __ASSEMBLY__ */ +/* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */ +#define OP_TYPE_CORE 0x0 +#define OP_TYPE_CLUSTER 0x1 + +/* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */ +#define SMC_POWERSTATE_IDLE 0x1 + #endif