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Wed, 18 Mar 2015 18:20:25 -0700 From: Peter Chen To: , Subject: [PATCH 02/12] usb: chipidea: set ITC to 0 for device mode Date: Thu, 19 Mar 2015 09:19:13 +0800 Message-ID: <1426727963-32280-3-git-send-email-peter.chen@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1426727963-32280-1-git-send-email-peter.chen@freescale.com> References: <1426727963-32280-1-git-send-email-peter.chen@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=peter.chen@freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(189002)(199003)(36756003)(62966003)(105606002)(77156002)(86362001)(77096005)(87936001)(50466002)(106466001)(33646002)(48376002)(229853001)(6806004)(50986999)(47776003)(50226001)(85426001)(2950100001)(19580405001)(92566002)(19580395003)(104016003)(46102003); DIR:OUT; SFP:1102; SCL:1; SRVR:BY1PR0301MB0854; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0301MB0854; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5005006)(5002010); SRVR:BY1PR0301MB0854; BCL:0; PCL:0; RULEID:; SRVR:BY1PR0301MB0854; X-Forefront-PRVS: 052017CAF1 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Mar 2015 01:20:28.5588 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR0301MB0854 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150318_182053_280235_A8E35012 X-CRM114-Status: GOOD ( 12.63 ) X-Spam-Score: -0.0 (/) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, pawel.moll@arm.com, robh+dt@kernel.org, Peter Chen , kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ITC (Interrupt Threshold Control) is used to set the maximum rate at which the host/device controller will issue interrupts. The default value is 8 (1ms) for it. EHCI core will modify it to 1, but device mode keeps it as default value. In some use cases like Android ADB, it only has one usb request for each direction, and maximum payload data is only 4KB, so the speed is 4MB/s at most, it needs controller to trigger interrupt as fast as possible to increase the speed. The USB performance will be better if the interrupt can be triggered faster. Reduce ITC value is benefit for USB performance, and the interrupt number is increased at the same time, it may increase cpu utilization too. Most of use case cares about performance, but some may care about cpu utilization, so, we leave a platform interface for user. We set ITC as 0 (immediate) as default value. Signed-off-by: Peter Chen --- drivers/usb/chipidea/core.c | 19 +++++++++++++++++++ include/linux/usb/chipidea.h | 2 ++ 2 files changed, 21 insertions(+) diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 74fea4f..8af9cbf 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -463,6 +463,13 @@ int hw_device_reset(struct ci_hdrc *ci) /* HW >= 2.3 */ hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); + /* + * Set interrupt interval for device mode + * host set ITC according to ehci-hcd module parameter log2_irq_thresh + */ + hw_write(ci, OP_USBCMD, 0xff0000, + ci->platdata->gadget_itc_setting << 16); + if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) { pr_err("cannot enter in %s device mode", ci_role(ci)->name); pr_err("lpm = %i", ci->hw_bank.lpm); @@ -560,6 +567,8 @@ static irqreturn_t ci_irq(int irq, void *data) static int ci_get_platdata(struct device *dev, struct ci_hdrc_platform_data *platdata) { + int ret; + if (!platdata->phy_mode) platdata->phy_mode = of_usb_get_phy_mode(dev->of_node); @@ -591,6 +600,16 @@ static int ci_get_platdata(struct device *dev, if (of_usb_get_maximum_speed(dev->of_node) == USB_SPEED_FULL) platdata->flags |= CI_HDRC_FORCE_FULLSPEED; + if (of_find_property(dev->of_node, "gadget-itc-setting", NULL)) { + ret = of_property_read_u32(dev->of_node, "gadget-itc-setting", + &platdata->gadget_itc_setting); + if (ret) { + dev_err(dev, + "failed to get gadget-itc-setting value\n"); + return ret; + } + } + return 0; } diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h index ab94f78..e69d829 100644 --- a/include/linux/usb/chipidea.h +++ b/include/linux/usb/chipidea.h @@ -35,6 +35,8 @@ struct ci_hdrc_platform_data { void (*notify_event) (struct ci_hdrc *ci, unsigned event); struct regulator *reg_vbus; bool tpl_support; + /* interrupt threshold value for gadget */ + u32 gadget_itc_setting; }; /* Default offset of capability registers */