From patchwork Wed Mar 25 11:27:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 6090451 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C5E909F318 for ; Wed, 25 Mar 2015 11:37:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E60BA2039D for ; Wed, 25 Mar 2015 11:37:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D1EEF20386 for ; Wed, 25 Mar 2015 11:37:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YajZz-00011Z-HH; Wed, 25 Mar 2015 11:34:35 +0000 Received: from ducie-dc1.codethink.co.uk ([185.25.241.215]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YajUL-00041W-58 for linux-arm-kernel@lists.infradead.org; Wed, 25 Mar 2015 11:28:46 +0000 Received: from localhost (localhost [127.0.0.1]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTP id 19A66460C19; Wed, 25 Mar 2015 11:27:59 +0000 (GMT) X-Virus-Scanned: Debian amavisd-new at ducie-dc1.codethink.co.uk Received: from ducie-dc1.codethink.co.uk ([127.0.0.1]) by localhost (ducie-dc1.codethink.co.uk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id on-HArMXyjfv; Wed, 25 Mar 2015 11:27:58 +0000 (GMT) Received: from rainbowdash.ducie.codethink.co.uk (rainbowdash.dyn.ducie.codethink.co.uk [10.24.2.193]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTPS id EDBA7460B92; Wed, 25 Mar 2015 11:27:56 +0000 (GMT) Received: from ben by rainbowdash.ducie.codethink.co.uk with local (Exim 4.84) (envelope-from ) id 1YajTY-0002lS-O7; Wed, 25 Mar 2015 11:27:56 +0000 From: Ben Dooks To: linux-arm-kernel@lists.infradead.org Subject: [PATCH RESEND 5/7] mmc: host: dw_mmc make IO accessors endian agnostic Date: Wed, 25 Mar 2015 11:27:50 +0000 Message-Id: <1427282872-10563-6-git-send-email-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427282872-10563-1-git-send-email-ben.dooks@codethink.co.uk> References: <1427282872-10563-1-git-send-email-ben.dooks@codethink.co.uk> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150325_042845_476882_85113EDA X-CRM114-Status: UNSURE ( 9.31 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: linux-kernel@lists.codethink.co.uk, Jaehoon Chung , Ulf Hansson , sam.bishop@codethink.co.uk, Seungwon Jeon , Linux MMC , Chris Ball , marc.dunford@codethink.co.uk, Ben Dooks , Dinh Nguyen X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The dw_mmc driver does not use endian agnostic IO accessors, so fix the use of __raw reads and writes to be the relaxed versions. This fixes the dw_mmc driver initialisation on Altera socfpga in big endian. Signed-off-by: Ben Dooks --- CC: Linux MMC CC: Linux ARM Kernel CC: Dinh Nguyen CC: Chris Ball CC: Ulf Hansson CC: Jaehoon Chung CC: Seungwon Jeon --- drivers/mmc/host/dw_mmc.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 18c4afe..46efdc5 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -171,22 +171,22 @@ /* Register access macros */ #define mci_readl(dev, reg) \ - __raw_readl((dev)->regs + SDMMC_##reg) + readl_relaxed((dev)->regs + SDMMC_##reg) #define mci_writel(dev, reg, value) \ - __raw_writel((value), (dev)->regs + SDMMC_##reg) + writel_relaxed((value), (dev)->regs + SDMMC_##reg) /* 16-bit FIFO access macros */ #define mci_readw(dev, reg) \ - __raw_readw((dev)->regs + SDMMC_##reg) + readw_relaxed((dev)->regs + SDMMC_##reg) #define mci_writew(dev, reg, value) \ - __raw_writew((value), (dev)->regs + SDMMC_##reg) + writew_relaxed((value), (dev)->regs + SDMMC_##reg) /* 64-bit FIFO access macros */ #ifdef readq #define mci_readq(dev, reg) \ - __raw_readq((dev)->regs + SDMMC_##reg) + readq_relaxed((dev)->regs + SDMMC_##reg) #define mci_writeq(dev, reg, value) \ - __raw_writeq((value), (dev)->regs + SDMMC_##reg) + writeq_relaxed((value), (dev)->regs + SDMMC_##reg) #else /* * Dummy readq implementation for architectures that don't define it.