From patchwork Wed Mar 25 20:25:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 6094861 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C1AEA9F318 for ; Wed, 25 Mar 2015 20:33:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E2FF12035E for ; Wed, 25 Mar 2015 20:33:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0A25420357 for ; Wed, 25 Mar 2015 20:33:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yarwj-00062s-0g; Wed, 25 Mar 2015 20:30:37 +0000 Received: from mail-pa0-f53.google.com ([209.85.220.53]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yarss-0002O5-0x for linux-arm-kernel@lists.infradead.org; Wed, 25 Mar 2015 20:26:38 +0000 Received: by pagj7 with SMTP id j7so40003996pag.2 for ; Wed, 25 Mar 2015 13:26:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=w0+AQumfXtzA9qzPnGFw5HUsoeBJK32fG/WF/KalQ0k=; b=FPH4qtsivRdbw0IcxetLPjXkB5bW+Vycq0nuFpQfrEMPwoYYXx8qttr6Td5p6sR6pQ R3IqEdH2L+kcD6W+lJKe36D4wmOx0T3yu8w6tf27ngQA9PDj3rkDr99wLsvaov/7/cMz v8hsQqV7L5irXHcMWZW7F5xT68OSTsVNIp9kGO5ZyUS4STkIzp+ICciDvXSiKzI0vkph f3gI95gXM4bfE1tJ+gQNjfyIuLYQV4ux4cU9NHu9C3to/yIj5VoY5UPj/am5RXYy1sNz qr6PgbkAbO0yXoMqOcKL/F2JMxpeNhorHMm1WDxK5A774UyX5inVCZrhI8BJpj2yxqrN cDHg== X-Gm-Message-State: ALoCoQkS2zlic8T8aHYX1OG1DjRYNIlvJF4t5FtLeEsASzQ1U6Yyp627FqyoCDq9evjs/PzB+LsU X-Received: by 10.67.8.73 with SMTP id di9mr19911555pad.107.1427315176165; Wed, 25 Mar 2015 13:26:16 -0700 (PDT) Received: from ubuntu.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by mx.google.com with ESMTPSA id nq8sm3333819pdb.37.2015.03.25.13.26.13 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Mar 2015 13:26:15 -0700 (PDT) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v18 09/11] ARM: dts: qcom: Add idle states device nodes for 8084 Date: Wed, 25 Mar 2015 14:25:34 -0600 Message-Id: <1427315136-44321-10-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1427315136-44321-1-git-send-email-lina.iyer@linaro.org> References: <1427315136-44321-1-git-send-email-lina.iyer@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150325_132638_109199_4DDB0643 X-CRM114-Status: UNSURE ( 7.45 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: msivasub@codeaurora.org, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, Lina Iyer , agross@codeaurora.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ARM common idle states device bindings for cpuidle support for APQ 8084. Support Standalone power collapse (SPC) idle state (power down that does not affect any SoC idle states) for each cpu. Cc: Kumar Gala Signed-off-by: Lina Iyer --- arch/arm/boot/dts/qcom-apq8084.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 8fe89a1..52856f1 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -22,6 +22,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_SPC>; }; cpu@1 { @@ -32,6 +33,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_SPC>; }; cpu@2 { @@ -42,6 +44,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_SPC>; }; cpu@3 { @@ -52,6 +55,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_SPC>; }; L2: l2-cache { @@ -59,6 +63,16 @@ cache-level = <2>; qcom,saw = <&saw_l2>; }; + + idle-states { + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", + "arm,idle-state"; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <2000>; + }; + }; }; cpu-pmu {