From patchwork Wed Mar 25 21:04:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 6095081 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 40C7E9F399 for ; Wed, 25 Mar 2015 21:08:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 661F82035B for ; Wed, 25 Mar 2015 21:08:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 485082034B for ; Wed, 25 Mar 2015 21:08:45 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YasV7-0000A8-I3; Wed, 25 Mar 2015 21:06:09 +0000 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YasUW-0008BK-MP for linux-arm-kernel@lists.infradead.org; Wed, 25 Mar 2015 21:05:34 +0000 Received: from mirror2.csie.ntu.edu.tw (mirror2.csie.ntu.edu.tw [140.112.30.76]) (Authenticated sender: b93043) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 3686E22698; Thu, 26 Mar 2015 05:05:10 +0800 (CST) Received: by mirror2.csie.ntu.edu.tw (Postfix, from userid 1000) id 1C9645F76E; Thu, 26 Mar 2015 05:05:10 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard Subject: [PATCH 1/3] ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node Date: Thu, 26 Mar 2015 05:04:47 +0800 Message-Id: <1427317489-708-2-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427317489-708-1-git-send-email-wens@csie.org> References: <1427317489-708-1-git-send-email-wens@csie.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150325_140532_886296_E05AE699 X-CRM114-Status: UNSURE ( 8.21 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) Cc: Marcus Cooper , linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, Hans de Goede , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On sun6i we already have PLL6 as AHB1 clock's parent. However this was previously set in the dma controller node, which takes effect when the dma controller is probed. We want this to take effect as soon as possible, so hrtimer rate calculation is correct, and to be sure the AHB1 clock rate remains as stable as possible. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun6i-a31.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 2a37ee93265e..6d29eab5fe32 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -196,6 +196,14 @@ reg = <0x01c20054 0x4>; clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; clock-output-names = "ahb1"; + + /* + * Clock AHB1 from PLL6, instead of CPU/AXI which + * has rate changes due to cpufreq. Also the DMA + * controller requires AHB1 clocked from PLL6. + */ + assigned-clocks = <&ahb1>; + assigned-clock-parents = <&pll6 0>; }; ahb1_gates: clk@01c20060 { @@ -381,10 +389,6 @@ clocks = <&ahb1_gates 6>; resets = <&ahb1_rst 6>; #dma-cells = <1>; - - /* DMA controller requires AHB1 clocked from PLL6 */ - assigned-clocks = <&ahb1>; - assigned-clock-parents = <&pll6 0>; }; mmc0: mmc@01c0f000 {