From patchwork Fri Apr 3 16:43:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 6157871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CF949BF4A6 for ; Fri, 3 Apr 2015 16:48:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D0BFB203ED for ; Fri, 3 Apr 2015 16:48:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CDE8E203EC for ; Fri, 3 Apr 2015 16:48:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ye4j0-0000wB-Ol; Fri, 03 Apr 2015 16:45:42 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ye4i5-0007ey-AL for linux-arm-kernel@lists.infradead.org; Fri, 03 Apr 2015 16:44:46 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NM800410P65IHB0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Sat, 04 Apr 2015 01:44:29 +0900 (KST) X-AuditID: cbfee61b-f79d76d0000024d6-0d-551ec36ca199 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id B2.BD.09430.C63CE155; Sat, 4 Apr 2015 01:44:29 +0900 (KST) Received: from amdc1032.digital.local ([106.116.147.136]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NM800HELP5F7X50@mmp1.samsung.com>; Sat, 04 Apr 2015 01:44:28 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar Subject: [PATCH 3/6] clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock Date: Fri, 03 Apr 2015 18:43:46 +0200 Message-id: <1428079429-4252-4-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1428079429-4252-1-git-send-email-b.zolnierkie@samsung.com> References: <'@samsung.com> <1428079429-4252-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrELMWRmVeSWpSXmKPExsVy+t9jAd3cw3KhBs9mMlpsnLGe1eL6l+es Fv8fvWa1OPq7wKJ3wVU2i/7Hr5ktvh5ewWjx5uFmRotNj6+xWlzeNYfN4nPvEUaLGef3MVk8 nXCRzeLwm3ZWi45ljBardv0BmvbVw0HQ4+/z6yweO2fdZffYtKqTzePOtT1sHpuX1Hv0bVnF 6LH92jxmj8+b5AI4orhsUlJzMstSi/TtErgyutcsYyn4LlfRfKWNrYHxoWQXIyeHhICJROez PYwQtpjEhXvr2boYuTiEBBYxSny9f50JwvnNKLH09FwmkCo2ASuJie2rGEESIgIfGCVev/sG 1sIsMJ9ZYsLTUywgVcICGRK7l2xjBrFZBFQlNi9qZQexeQXcJa69XAU0iQNon4LEnEk2IGFO AQ+JqXfus4HYQgKREiu+X2WcwMi7gJFhFaNoakFyQXFSeq6RXnFibnFpXrpecn7uJkZwSD+T 3sG4qsHiEKMAB6MSD++DQLlQIdbEsuLK3EOMEhzMSiK8k3cChXhTEiurUovy44tKc1KLDzFK c7AoifPO0QVKCaQnlqRmp6YWpBbBZJk4OKUaGKNfd7N3/Vv0NT/NcnqKa+rM/2YPNtx4vjIo PHmr2b3eR5M3rr1Qw/pjS+9k3RPCXo6Rtm8nS202kOOvjrfJ8qz0X1z7debKfxKHFrof3FXz 0YJX8Ln5tAbNNlvVuBOcN6/3bZf7sttPji+p/rmKv8bc/1aPP981CNq8flIvw/ZVMftrhTbE L1RiKc5INNRiLipOBAC0gwDvZQIAAA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150403_094445_545686_F34F186E X-CRM114-Status: GOOD ( 14.27 ) X-Spam-Score: -5.0 (-----) Cc: Lukasz Majewski , Kevin Hilman , Heiko Stuebner , linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, Tomasz Figa , linux-kernel@vger.kernel.org, Chanwoo Choi , linux-samsung-soc@vger.kernel.org, Javier Martinez Canillas , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thomas Abraham With the addition of the new Samsung specific cpu-clock type, the arm clock can be represented as a cpu-clock type. Add the CPU clock configuration data and instantiate the CPU clock type for Exynos4210. Changes by Bartlomiej: - fixed issue with wrong dividers being setup by Common Clock Framework (by an addition of CLK_RECALC_NEW_RATES clock flag to mout_apll clock, without this change cpufreq-dt driver showed ~10 mA larger energy consumption when compared to cpufreq-exynos one when "performance" cpufreq governor was used on Exynos4210 SoC based Origen board), this was probably meant to be workarounded by use of CLK_GET_RATE_NOCACHE and CLK_DIVIDER_READ_ONLY clock flags in the original patchset (in "[PATCH v12 6/6] clk: samsung: remove unused clock aliases and update clock flags") but using these flags is not sufficient to fix the issue observed - removed Exynos5250 and Exynos5420 support for now Cc: Tomasz Figa Cc: Mike Turquette Cc: Javier Martinez Canillas Signed-off-by: Thomas Abraham Signed-off-by: Bartlomiej Zolnierkiewicz --- drivers/clk/samsung/clk-exynos4.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 714d6ba..cae2c048 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -19,6 +19,7 @@ #include #include "clk.h" +#include "clk-cpu.h" /* Exynos4 clock controller register offsets */ #define SRC_LEFTBUS 0x4200 @@ -534,7 +535,8 @@ static struct samsung_fixed_factor_clock exynos4x12_fixed_factor_clks[] __initda /* list of mux clocks supported in all exynos4 soc's */ static struct samsung_mux_clock exynos4_mux_clks[] __initdata = { MUX_FA(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, - CLK_SET_RATE_PARENT, 0, "mout_apll"), + CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0, + "mout_apll"), MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1), MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1), MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1), @@ -1378,6 +1380,22 @@ static void __init exynos4x12_core_down_clock(void) __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2); } +#define E4210_CPU_DIV0(apll, pclk_dbg, atb, periph, corem1, corem0) \ + (((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \ + ((periph) << 12) | ((corem1) << 8) | ((corem0) << 4)) +#define E4210_CPU_DIV1(hpm, copy) \ + (((hpm) << 4) | ((copy) << 0)) + +static const struct exynos_cpuclk_cfg_data e4210_armclk_d[] __initconst = { + { 1200000, E4210_CPU_DIV0(7, 1, 4, 3, 7, 3), E4210_CPU_DIV1(0, 5), }, + { 1000000, E4210_CPU_DIV0(7, 1, 4, 3, 7, 3), E4210_CPU_DIV1(0, 4), }, + { 800000, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), }, + { 500000, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), }, + { 400000, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), }, + { 200000, E4210_CPU_DIV0(0, 1, 1, 1, 3, 1), E4210_CPU_DIV1(0, 3), }, + { 0 }, +}; + /* register exynos4 clocks */ static void __init exynos4_clk_init(struct device_node *np, enum exynos4_soc soc) @@ -1455,6 +1473,10 @@ static void __init exynos4_clk_init(struct device_node *np, samsung_clk_register_fixed_factor(ctx, exynos4210_fixed_factor_clks, ARRAY_SIZE(exynos4210_fixed_factor_clks)); + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_core_p4210[0], mout_core_p4210[1], 0x14200, + e4210_armclk_d, ARRAY_SIZE(e4210_armclk_d), + CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); } else { samsung_clk_register_mux(ctx, exynos4x12_mux_clks, ARRAY_SIZE(exynos4x12_mux_clks));