From patchwork Tue Apr 21 15:49:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 6251051 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CABB09F1C4 for ; Tue, 21 Apr 2015 15:55:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DE215202D1 for ; Tue, 21 Apr 2015 15:55:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0780A20222 for ; Tue, 21 Apr 2015 15:55:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YkaTl-00036L-1g; Tue, 21 Apr 2015 15:52:53 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YkaRe-0001nc-R6 for linux-arm-kernel@lists.infradead.org; Tue, 21 Apr 2015 15:50:43 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NN5005P7YNXZA50@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 22 Apr 2015 00:50:21 +0900 (KST) X-AuditID: cbfee61a-f79516d000006302-d5-553671bc760c Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id F2.0D.25346.CB176355; Wed, 22 Apr 2015 00:50:21 +0900 (KST) Received: from amdc1032.digital.local ([106.116.147.136]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NN500HV8YM5C980@mmp2.samsung.com>; Wed, 22 Apr 2015 00:50:20 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar Subject: [PATCH v2 6/8] clk: samsung: exynos5800: fix cpu clock configuration data Date: Tue, 21 Apr 2015 17:49:03 +0200 Message-id: <1429631345-16409-7-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1429631345-16409-1-git-send-email-b.zolnierkie@samsung.com> References: <1429631345-16409-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsVy+t9jQd29hWahBquesllsnLGe1eL6l+es Fv8fvWa1OPq7wKJ3wVU2i/7Hr5ktvh5ewWjx5uFmRotNj6+xWlzeNYfN4nPvEUaLGef3MVk8 nXCRzeLwm3ZWi45ljBardv1htNj41cNB0OPv8+ssHjtn3WX32LSqk83jzrU9bB6bl9R79G1Z xeix/do8Zo/Pm+QCOKK4bFJSczLLUov07RK4Mj7uWctWsFyi4ur7c8wNjHNFuhg5OSQETCQW v9vKDmGLSVy4t56ti5GLQ0hgOqPExS1fmSGc34wSP1pusIFUsQlYSUxsX8UIkhAR+MAo8frd N7AWZoH5zBITnp5iAakSFgiR+PPsLDOIzSKgKjH961Owbl4BD4lDZ74zdTFyAO1TkJgzyQbE 5BTwlFh/LBWkQgioYuL0newTGHkXMDKsYhRNLUguKE5KzzXUK07MLS7NS9dLzs/dxAgO6GdS OxhXNlgcYhTgYFTi4V0xwTRUiDWxrLgy9xCjBAezkgivoJBZqBBvSmJlVWpRfnxRaU5q8SFG aQ4WJXHeObpyoUIC6YklqdmpqQWpRTBZJg5OqQbGXPW0+hs8jpcm5ulOWBL/fGfsnRcXF5fw SXXyyVvs7f3Mnn2xZ5LW5ngpq09n1gedrgswmqG77Ea03jNZfS8py5wGln8rp4vnc7W3l+/W 6rKMvT/967xjGjbWYUfvG6YwXfj62Kn+7aHXhnZBB0pOJd6N+cV6a5vrI5PrJ0X1lgq9Zrgs sKBFiaU4I9FQi7moOBEA8UsNo2QCAAA= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150421_085043_108108_356F79BD X-CRM114-Status: GOOD ( 10.25 ) X-Spam-Score: -5.0 (-----) Cc: Lukasz Majewski , Kevin Hilman , Heiko Stuebner , linux-pm@vger.kernel.org, b.zolnierkie@samsung.com, Tomasz Figa , linux-kernel@vger.kernel.org, Chanwoo Choi , linux-samsung-soc@vger.kernel.org, Javier Martinez Canillas , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix cpu clock configuration data for Exynos5800 (it uses higher PCLK_DBG divider values than Exynos5420 and supports additional frequencies). Based on Hardkernel's kernel for ODROID-XU3 board. Cc: Tomasz Figa Cc: Mike Turquette Cc: Javier Martinez Canillas Cc: Thomas Abraham Signed-off-by: Bartlomiej Zolnierkiewicz --- drivers/clk/samsung/clk-exynos5420.c | 36 +++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 9398a2d..462aaee 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -1274,10 +1274,34 @@ static const struct exynos_cpuclk_cfg_data exynos5420_eglclk_d[] __initconst = { { 0 }, }; +static const struct exynos_cpuclk_cfg_data exynos5800_eglclk_d[] __initconst = { + { 2000000, E5420_EGL_DIV0(3, 7, 7, 4), }, + { 1900000, E5420_EGL_DIV0(3, 7, 7, 4), }, + { 1800000, E5420_EGL_DIV0(3, 7, 7, 4), }, + { 1700000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1600000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1500000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1400000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1300000, E5420_EGL_DIV0(3, 7, 7, 2), }, + { 1200000, E5420_EGL_DIV0(3, 7, 7, 2), }, + { 1100000, E5420_EGL_DIV0(3, 7, 7, 2), }, + { 1000000, E5420_EGL_DIV0(3, 7, 6, 2), }, + { 900000, E5420_EGL_DIV0(3, 7, 6, 2), }, + { 800000, E5420_EGL_DIV0(3, 7, 5, 2), }, + { 700000, E5420_EGL_DIV0(3, 7, 5, 2), }, + { 600000, E5420_EGL_DIV0(3, 7, 4, 2), }, + { 500000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 400000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 300000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 200000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 0 }, +}; + #define E5420_KFC_DIV(kpll, pclk, aclk) \ ((((kpll) << 24) | ((pclk) << 20) | ((aclk) << 4))) static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = { + { 1400000, E5420_KFC_DIV(3, 5, 3), }, /* for Exynos5800 */ { 1300000, E5420_KFC_DIV(3, 5, 2), }, { 1200000, E5420_KFC_DIV(3, 5, 2), }, { 1100000, E5420_KFC_DIV(3, 5, 2), }, @@ -1357,9 +1381,15 @@ static void __init exynos5x_clk_init(struct device_node *np, ARRAY_SIZE(exynos5800_gate_clks)); } - exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", - mout_cpu_p[0], mout_cpu_p[1], 0x200, - exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0); + if (soc == EXYNOS5420) { + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_cpu_p[0], mout_cpu_p[1], 0x200, + exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0); + } else { + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_cpu_p[0], mout_cpu_p[1], 0x200, + exynos5800_eglclk_d, ARRAY_SIZE(exynos5800_eglclk_d), 0); + } exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk", mout_kfc_p[0], mout_kfc_p[1], 0x28200, exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);