| Message ID | 1430310000-10867-3-git-send-email-ivan.ivanov@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 29 April 2015 at 06:20, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. > > Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++ > 1 file changed, 244 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi > new file mode 100644 > index 0000000..08d8582 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi > @@ -0,0 +1,244 @@ > +/* > + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 and > + * only version 2 as published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +&soc { > + > + tpiu@820000 { > + compatible = "arm,coresight-tpiu", "arm,primecell"; > + reg = <0x820000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + port { > + tpiu_in: endpoint { > + slave-mode; > + remote-endpoint = <&replicator_out1>; > + }; > + }; > + }; > + > + funnel@821000 { > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0x821000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@4 { > + reg = <4>; > + funnel0_in4: endpoint { > + slave-mode; > + remote-endpoint = <&funnel1_out>; > + }; > + }; > + port@8 { > + reg = <0>; > + funnel0_out: endpoint { > + remote-endpoint = <&etf_in>; > + }; > + }; Please add a comment indicating what the other ports are connected to. > + }; > + }; > + > + replicator@824000 { > + compatible = "qcom,coresight-replicator", "arm,primecell"; > + reg = <0x824000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + replicator_out0: endpoint { > + remote-endpoint = <&etr_in>; > + }; > + }; > + port@1 { > + reg = <1>; > + replicator_out1: endpoint { > + remote-endpoint = <&tpiu_in>; > + }; > + }; > + port@2 { > + reg = <0>; > + replicator_in: endpoint { > + slave-mode; > + remote-endpoint = <&etf_out>; > + }; > + }; Same comment as with the funnel component. > + }; > + }; > + > + etf@825000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x825000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + etf_out: endpoint { > + slave-mode; > + remote-endpoint = <&funnel0_out>; > + }; > + }; > + port@1 { > + reg = <0>; > + etf_in: endpoint { > + remote-endpoint = <&replicator_in>; > + }; > + }; > + }; > + }; > + > + etr@826000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x826000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + port { > + etr_in: endpoint { > + slave-mode; > + remote-endpoint = <&replicator_out0>; > + }; > + }; > + }; > + > + funnel@841000 { /* APSS */ > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0x841000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + funnel1_in0: endpoint { > + slave-mode; > + remote-endpoint = <&etm0_out>; > + }; > + }; > + port@1 { > + reg = <1>; > + funnel1_in1: endpoint { > + slave-mode; > + remote-endpoint = <&etm1_out>; > + }; > + }; > + port@2 { > + reg = <2>; > + funnel1_in2: endpoint { > + slave-mode; > + remote-endpoint = <&etm2_out>; > + }; > + }; > + port@3 { > + reg = <3>; > + funnel1_in3: endpoint { > + slave-mode; > + remote-endpoint = <&etm3_out>; > + }; > + }; > + port@4 { > + reg = <0>; > + funnel1_out: endpoint { > + remote-endpoint = <&funnel0_in4>; > + }; > + }; Same comment as with the funnel component. > + }; > + }; > + > + etm@85c000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85c000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU0>; > + > + port { > + etm0_out: endpoint { > + remote-endpoint = <&funnel1_in0>; > + }; > + }; > + }; > + > + etm@85d000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85d000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU1>; > + > + port { > + etm1_out: endpoint { > + remote-endpoint = <&funnel1_in1>; > + }; > + }; > + }; > + > + etm@85e000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85e000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU2>; > + > + port { > + etm2_out: endpoint { > + remote-endpoint = <&funnel1_in2>; > + }; > + }; > + }; > + > + etm@85f000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85f000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU3>; > + > + port { > + etm3_out: endpoint { > + remote-endpoint = <&funnel1_in3>; > + }; > + }; > + }; > +}; > -- > 1.9.1 >
On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote: > On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote: > > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. > > > Please add a comment indicating what the other ports are connected to. > Thank you. Will fix and resend. Ivan
On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote: > On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote: > > + > > + funnel@821000 { > > + compatible = "arm,coresight-funnel", "arm,primecell"; > > + reg = <0x821000 0x1000>; > > + > > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > > + clock-names = "apb_pclk", "atclk"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@4 { > > + reg = <4>; > > + funnel0_in4: endpoint { > > + slave-mode; > > + remote-endpoint = <&funnel1_out>; > > + }; > > + }; > > + port@8 { > > + reg = <0>; > > + funnel0_out: endpoint { > > + remote-endpoint = <&etf_in>; > > + }; > > + }; > > Please add a comment indicating what the other ports are connected to. > > > + }; > > + }; > > + > > + replicator@824000 { > > + compatible = "qcom,coresight-replicator", "arm,primecell"; > > + reg = <0x824000 0x1000>; > > + > > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > > + clock-names = "apb_pclk", "atclk"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + replicator_out0: endpoint { > > + remote-endpoint = <&etr_in>; > > + }; > > + }; > > + port@1 { > > + reg = <1>; > > + replicator_out1: endpoint { > > + remote-endpoint = <&tpiu_in>; > > + }; > > + }; > > + port@2 { > > + reg = <0>; > > + replicator_in: endpoint { > > + slave-mode; > > + remote-endpoint = <&etf_out>; > > + }; > > + }; > > Same comment as with the funnel component. Sorry, but what do you mean here? Regards, Ivan
On 30 April 2015 at 03:24, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: > > On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote: >> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote: > > >> > + >> > + funnel@821000 { >> > + compatible = "arm,coresight-funnel", "arm,primecell"; >> > + reg = <0x821000 0x1000>; >> > + >> > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; >> > + clock-names = "apb_pclk", "atclk"; >> > + >> > + ports { >> > + #address-cells = <1>; >> > + #size-cells = <0>; >> > + >> > + port@4 { >> > + reg = <4>; >> > + funnel0_in4: endpoint { >> > + slave-mode; >> > + remote-endpoint = <&funnel1_out>; >> > + }; >> > + }; >> > + port@8 { >> > + reg = <0>; >> > + funnel0_out: endpoint { >> > + remote-endpoint = <&etf_in>; >> > + }; >> > + }; >> >> Please add a comment indicating what the other ports are connected to. >> >> > + }; >> > + }; >> > + >> > + replicator@824000 { >> > + compatible = "qcom,coresight-replicator", "arm,primecell"; >> > + reg = <0x824000 0x1000>; >> > + >> > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; >> > + clock-names = "apb_pclk", "atclk"; >> > + >> > + ports { >> > + #address-cells = <1>; >> > + #size-cells = <0>; >> > + >> > + port@0 { >> > + reg = <0>; >> > + replicator_out0: endpoint { >> > + remote-endpoint = <&etr_in>; >> > + }; >> > + }; >> > + port@1 { >> > + reg = <1>; >> > + replicator_out1: endpoint { >> > + remote-endpoint = <&tpiu_in>; >> > + }; >> > + }; >> > + port@2 { >> > + reg = <0>; >> > + replicator_in: endpoint { >> > + slave-mode; >> > + remote-endpoint = <&etf_out>; >> > + }; >> > + }; >> >> Same comment as with the funnel component. > > Sorry, but what do you mean here? My bad - replicators have only one input port and two output ones. Forget about this comments. > > Regards, > Ivan
diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi new file mode 100644 index 0000000..08d8582 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi @@ -0,0 +1,244 @@ +/* + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + + tpiu@820000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x820000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + port { + tpiu_in: endpoint { + slave-mode; + remote-endpoint = <&replicator_out1>; + }; + }; + }; + + funnel@821000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x821000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@4 { + reg = <4>; + funnel0_in4: endpoint { + slave-mode; + remote-endpoint = <&funnel1_out>; + }; + }; + port@8 { + reg = <0>; + funnel0_out: endpoint { + remote-endpoint = <&etf_in>; + }; + }; + }; + }; + + replicator@824000 { + compatible = "qcom,coresight-replicator", "arm,primecell"; + reg = <0x824000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + replicator_out0: endpoint { + remote-endpoint = <&etr_in>; + }; + }; + port@1 { + reg = <1>; + replicator_out1: endpoint { + remote-endpoint = <&tpiu_in>; + }; + }; + port@2 { + reg = <0>; + replicator_in: endpoint { + slave-mode; + remote-endpoint = <&etf_out>; + }; + }; + }; + }; + + etf@825000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x825000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + etf_out: endpoint { + slave-mode; + remote-endpoint = <&funnel0_out>; + }; + }; + port@1 { + reg = <0>; + etf_in: endpoint { + remote-endpoint = <&replicator_in>; + }; + }; + }; + }; + + etr@826000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x826000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + port { + etr_in: endpoint { + slave-mode; + remote-endpoint = <&replicator_out0>; + }; + }; + }; + + funnel@841000 { /* APSS */ + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x841000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel1_in0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out>; + }; + }; + port@1 { + reg = <1>; + funnel1_in1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out>; + }; + }; + port@2 { + reg = <2>; + funnel1_in2: endpoint { + slave-mode; + remote-endpoint = <&etm2_out>; + }; + }; + port@3 { + reg = <3>; + funnel1_in3: endpoint { + slave-mode; + remote-endpoint = <&etm3_out>; + }; + }; + port@4 { + reg = <0>; + funnel1_out: endpoint { + remote-endpoint = <&funnel0_in4>; + }; + }; + }; + }; + + etm@85c000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85c000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU0>; + + port { + etm0_out: endpoint { + remote-endpoint = <&funnel1_in0>; + }; + }; + }; + + etm@85d000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85d000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU1>; + + port { + etm1_out: endpoint { + remote-endpoint = <&funnel1_in1>; + }; + }; + }; + + etm@85e000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85e000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU2>; + + port { + etm2_out: endpoint { + remote-endpoint = <&funnel1_in2>; + }; + }; + }; + + etm@85f000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85f000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU3>; + + port { + etm3_out: endpoint { + remote-endpoint = <&funnel1_in3>; + }; + }; + }; +};
Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++ 1 file changed, 244 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi -- 1.9.1