From patchwork Thu May 14 16:13:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hauke Mehrtens X-Patchwork-Id: 6407461 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 44A04C0432 for ; Thu, 14 May 2015 16:26:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3806C20462 for ; Thu, 14 May 2015 16:26:21 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4666A203F7 for ; Thu, 14 May 2015 16:26:20 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ysvui-0006OS-9Y; Thu, 14 May 2015 16:23:12 +0000 Received: from hauke-m.de ([5.39.93.123]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsvmF-0006DP-L4 for linux-arm-kernel@lists.infradead.org; Thu, 14 May 2015 16:14:28 +0000 Received: from hauke-desktop.fritz.box (p5DE94812.dip0.t-ipconnect.de [93.233.72.18]) by hauke-m.de (Postfix) with ESMTPSA id 06FDC200F7; Thu, 14 May 2015 18:14:03 +0200 (CEST) From: Hauke Mehrtens To: linux@arm.linux.org.uk, arnd@arndb.de Subject: [PATCH v2] ARM: l2c: add options to overwrite prefetching behavior Date: Thu, 14 May 2015 18:13:55 +0200 Message-Id: <1431620035-7183-1-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150514_091427_958151_948DBF0C X-CRM114-Status: GOOD ( 10.06 ) X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, Hauke Mehrtens , linux-arm-kernel@lists.infradead.org, geert+renesas@glider.be, catalin.marinas@arm.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These options make it possible to overwrites the data and instruction prefetching behavior of the arm pl310 cache controller. We have to set these values in the aux and the prefetch register, because these two bits in the aux registers are mapped to the prefetch register. If only the prefetch register is changed there is an inconsistence in the state in this driver. Signed-off-by: Hauke Mehrtens --- Documentation/devicetree/bindings/arm/l2cc.txt | 4 ++++ arch/arm/mm/cache-l2x0.c | 30 ++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt index 0dbabe9..528821a 100644 --- a/Documentation/devicetree/bindings/arm/l2cc.txt +++ b/Documentation/devicetree/bindings/arm/l2cc.txt @@ -67,6 +67,10 @@ Optional properties: disable if zero. - arm,prefetch-offset : Override prefetch offset value. Valid values are 0-7, 15, 23, and 31. +- arm,prefetch-data : Enable data prefetch. Enabling prefetching + can improve performance. +- arm,prefetch-instr : Enable instruction prefetch. Enabling prefetching + can improve performance. Example: diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index e309c8f..088b5ad 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1199,6 +1199,36 @@ static void __init l2c310_of_parse(const struct device_node *np, pr_err("L2C-310 OF arm,prefetch-offset property value is missing\n"); } + ret = of_property_read_u32(np, "arm,prefetch-data", &val); + if (ret == 0) { + if (val) { + prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH; + *aux_val |= L310_AUX_CTRL_DATA_PREFETCH; + *aux_mask &= ~L310_AUX_CTRL_DATA_PREFETCH; + } else { + prefetch &= ~L310_PREFETCH_CTRL_DATA_PREFETCH; + *aux_val &= ~L310_AUX_CTRL_DATA_PREFETCH; + *aux_mask |= L310_AUX_CTRL_DATA_PREFETCH; + } + } else if (ret != -EINVAL) { + pr_err("L2C-310 OF arm,prefetch-data property value is missing\n"); + } + + ret = of_property_read_u32(np, "arm,prefetch-instr", &val); + if (ret == 0) { + if (val) { + prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH; + *aux_val |= L310_AUX_CTRL_INSTR_PREFETCH; + *aux_mask &= ~L310_AUX_CTRL_INSTR_PREFETCH; + } else { + prefetch &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH; + *aux_val &= ~L310_AUX_CTRL_INSTR_PREFETCH; + *aux_mask |= L310_AUX_CTRL_INSTR_PREFETCH; + } + } else if (ret != -EINVAL) { + pr_err("L2C-310 OF arm,prefetch-instr property value is missing\n"); + } + l2x0_saved_regs.prefetch_ctrl = prefetch; }