From patchwork Fri May 22 23:32:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 6469841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3D1DC9F1CC for ; Fri, 22 May 2015 23:36:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 578A7204D2 for ; Fri, 22 May 2015 23:36:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 66DA42044C for ; Fri, 22 May 2015 23:36:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YvwSU-0001J2-HX; Fri, 22 May 2015 23:34:30 +0000 Received: from exprod5og106.obsmtp.com ([64.18.0.182] helo=mail-ig0-f178.google.com) by bombadil.infradead.org with smtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YvwRr-00013N-Dl for linux-arm-kernel@lists.infradead.org; Fri, 22 May 2015 23:33:52 +0000 Received: from mail-ig0-f178.google.com ([209.85.213.178]) (using TLSv1) by exprod5ob106.postini.com ([64.18.4.12]) with SMTP ID DSNKVV+8zOrhOXTpOguPd/HANUgiPS+TbJF/@postini.com; Fri, 22 May 2015 16:33:51 PDT Received: by igcau1 with SMTP id au1so1779443igc.1 for ; Fri, 22 May 2015 16:33:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HY9XjLCPLe67Mv0oQ67kgU+2ON73nVM/W6a2l3ryHCY=; b=iuvJA6k9QO1EGB/g9TjXg8VaBFnc+L2NN3mGz9cat/9ZDrWRw5XHiMbh4jctI+5o6U 9hDFa4OGixGMFK0WPoAr0V5OmwxZev77Tg73pXS4V7/gH5HqhTJswHuzkPXf8dv85j7u G2HQuGYNb2Q/E8+d9aNlIDGa+rtyr2Ly/Aj2c1C3W0qNLNYtuS1T4HbUFXBddZaL7etj rZ+b7avrldWTdqN3tXxjbc8R6GkCBgIiz3Zsl1GFvIkxJdEpLzoLi5EErA9bpkaWXmTJ er3Q7avPLYYa+AY63MrdXFqwh4r5GEzpYalD2K222/RbjjQ0mbVGn9txdJVShRQboUpA ZKYQ== X-Received: by 10.50.64.243 with SMTP id r19mr8723482igs.5.1432337612468; Fri, 22 May 2015 16:33:32 -0700 (PDT) X-Gm-Message-State: ALoCoQlZD8gbJglIt6hbqVzIXn9jyutuG/7MgVJ8QJqXYOx5shCPuMY19bfLPFREO0JOFK7tzjMNKbaTpoEalf0a7KK2RoOI661hkTU7jkRBj6urpI0ebwxlQaIIrdO+OWDK15bLK4ADKkc/ifvREtZC+2N7U7JNrUjpoTsB4CWQ51w/zcQsd00= X-Received: by 10.50.64.243 with SMTP id r19mr8723464igs.5.1432337612305; Fri, 22 May 2015 16:33:32 -0700 (PDT) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id 16sm2914074ion.20.2015.05.22.16.33.30 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 22 May 2015 16:33:31 -0700 (PDT) From: Loc Ho To: dougthompson@xmission.com, bp@alien8.de, mchehab@osg.samsung.com, robh+dt@kernel.org, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk Subject: [PATCH v11 3/5] Documentation: Add documentation for the APM X-Gene SoC EDAC DTS binding Date: Fri, 22 May 2015 17:32:58 -0600 Message-Id: <1432337580-3750-4-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1432337580-3750-3-git-send-email-lho@apm.com> References: <1432337580-3750-1-git-send-email-lho@apm.com> <1432337580-3750-2-git-send-email-lho@apm.com> <1432337580-3750-3-git-send-email-lho@apm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150522_163351_583100_97B0B7A5 X-CRM114-Status: UNSURE ( 9.89 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) Cc: devicetree@vger.kernel.org, jcm@redhat.com, patches@apm.com, Loc Ho , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds documentation for the APM X-Gene SoC EDAC DTS binding. Signed-off-by: Loc Ho Acked-by: Arnd Bergmann --- .../devicetree/bindings/edac/apm-xgene-edac.txt | 78 ++++++++++++++++++++ 1 files changed, 78 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt diff --git a/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt b/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file mode 100644 index 0000000..480911c --- /dev/null +++ b/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt @@ -0,0 +1,78 @@ +* APM X-Gene SoC EDAC node + +EDAC node is defined to describe on-chip error detection and correction. +The follow error types are supported: + + memory controller - Memory controller + PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache + +The following section describes the EDAC DT node binding. + +Required properties: +- compatible : Shall be "apm,xgene-edac". +- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. +- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. +- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. +- regmap-efuse : Regmap of the PMD efuse resource. +- reg : First resource shall be the CPU bus (PCP) resource. +- interrupts : Interrupt-specifier for MCU, PMD, L3, or SoC error + IRQ(s). + +Required properties for memory controller subnode: +- compatible : Shall be "apm,xgene-edac-mc". +- reg : First resource shall be the memory controller unit + (MCU) resource. +- memory-controller : Instance number of the memory controller. + +Required properties for PMD subnode: +- compatible : Shall be "apm,xgene-edac-pmd". +- reg : First resource shall be the PMD resource. +- pmd-controller : Instance number of the PMD controller. + +Example: + csw: csw@7e200000 { + compatible = "apm,xgene-csw", "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba@7e700000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb@7e720000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + efuse: efuse@1054a000 { + compatible = "apm,xgene-efuse", "syscon"; + reg = <0x0 0x1054a000 0x0 0x20>; + }; + + edac@78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + regmap-efuse = <&efuse>; + reg = <0x0 0x78800000 0x0 0x100>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc@7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e800000 0x0 0x1000>; + memory-controller = <0>; + }; + + edacpmd@7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c000000 0x0 0x200000>; + pmd-controller = <0>; + }; + };