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[99.103.66.154]) by mx.google.com with ESMTPSA id c3sm1525494pdk.39.2015.06.02.19.31.04 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 02 Jun 2015 19:31:05 -0700 (PDT) From: dinh.linux@gmail.com To: arm@kernel.org Subject: [PATCH] ARM: socfpga: dts: enable ethernet for Arria10 devkit Date: Tue, 2 Jun 2015 21:31:00 -0500 Message-Id: <1433298660-4204-1-git-send-email-dinh.linux@gmail.com> X-Mailer: git-send-email 1.9.1.315.g3f09db0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150602_193128_844548_61D0D12E X-CRM114-Status: GOOD ( 11.64 ) X-Spam-Score: -0.8 (/) Cc: dinguyen@opensource.altera.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dinh Nguyen Update the arria10 gmac nodes with all the necessary properties for ethernet to function on the Arria10 devkit. Signed-off-by: Dinh Nguyen --- Hi Arnd, Kevin, Olof: Please apply this patch for v4.2. I couldn't add this patch to the pull request as this patch will cause a merge conflict if it was based on v4.1-rcX. Thanks, Dinh --- arch/arm/boot/dts/socfpga_arria10.dtsi | 11 +++++++++++ arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 28 ++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index abf9763..37a68e0 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -396,6 +396,7 @@ gmac0: ethernet@ff800000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac"; + altr,sysmgr-syscon = <&sysmgr 0x44 0>; reg = <0xff800000 0x2000>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; @@ -403,11 +404,16 @@ mac-address = [00 00 00 00 00 00]; snps,multicast-filter-bins = <256>; snps,perfect-filter-entries = <128>; + tx-fifo-depth = <4096>; + rx-fifo-depth = <16384>; + clocks = <&l4_mp_clk>; + clock-names = "stmmaceth"; status = "disabled"; }; gmac1: ethernet@ff802000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac"; + altr,sysmgr-syscon = <&sysmgr 0x48 0>; reg = <0xff802000 0x2000>; interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; @@ -417,11 +423,14 @@ snps,perfect-filter-entries = <128>; tx-fifo-depth = <4096>; rx-fifo-depth = <16384>; + clocks = <&l4_mp_clk>; + clock-names = "stmmaceth"; status = "disabled"; }; gmac2: ethernet@ff804000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac"; + altr,sysmgr-syscon = <&sysmgr 0x4C 0>; reg = <0xff804000 0x2000>; interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; @@ -431,6 +440,8 @@ snps,perfect-filter-entries = <128>; tx-fifo-depth = <4096>; rx-fifo-depth = <16384>; + clocks = <&l4_mp_clk>; + clock-names = "stmmaceth"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi index 347ca4e..94a0709 100644 --- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi @@ -41,6 +41,34 @@ }; }; +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + /* + * These skews assume the user's FPGA design is adding 600ps of delay + * for TX_CLK on Arria 10. + * + * All skews are offset since hardware skew values for the ksz9031 + * range from a negative skew to a positive skew. + * See the micrel-ksz90x1.txt Documentation file for details. + */ + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + max-frame-size = <3800>; + status = "okay"; +}; + &uart1 { status = "okay"; };