From patchwork Wed Jun 10 20:09:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 6584511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 18C049F326 for ; Wed, 10 Jun 2015 20:13:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D1A3A2060B for ; Wed, 10 Jun 2015 20:13:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 980BD20606 for ; Wed, 10 Jun 2015 20:13:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2mKX-0004JQ-A9; Wed, 10 Jun 2015 20:10:33 +0000 Received: from mail-wi0-f170.google.com ([209.85.212.170]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2mKJ-00034X-4O for linux-arm-kernel@lists.infradead.org; Wed, 10 Jun 2015 20:10:20 +0000 Received: by wifx6 with SMTP id x6so57708483wif.0 for ; Wed, 10 Jun 2015 13:10:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qdfMMPDYod1S8B68jDLzSr1h6WJDKMgibPQ+fwc0Jh0=; b=C/J7tpksfwoPSbVuuMxVxPMThH0uY9APoaM/Mc2fEDfrr2AWpiUvApbEd7GQuovG0F rz4brzqmLjm4yw8aXBaqg6RspOlqM3buTsKr4J57SfNf0GXNxkQnjKy1HsVPK+oBIQhp dMpJ6IaeSgcE68rmvo8hrECLpUOhLRziz4699yqzzbkjhAqnoxAmgpT+Rc5v0N96Q57q gub25XurSbWkrBdfpkehcqzaON43NwIkxdRMSGHcf/USCtzB+w38dwwrkZ8TC6SVvood MTl/CpmG/II+lky6JBw82D4nW478XH/u7fi7bUUxe6PA8LlEaOFkRYRPDbkqnyyoL3SI NcDw== X-Gm-Message-State: ALoCoQmpOXc3MyFpeNFiKtNyA77chuNbToqmRtv2H8LTMyvDtz9ExQc08jWjRmeYIO5aKUbqbEMO X-Received: by 10.180.187.203 with SMTP id fu11mr22525355wic.26.1433967000238; Wed, 10 Jun 2015 13:10:00 -0700 (PDT) Received: from scallop.lan (cpc4-aztw19-0-0-cust71.18-1.cable.virginm.net. [82.33.25.72]) by mx.google.com with ESMTPSA id u9sm16105057wju.44.2015.06.10.13.09.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Jun 2015 13:09:59 -0700 (PDT) From: Daniel Thompson To: Mike Turquette , Stephen Boyd Subject: [PATCH v3 3/3] ARM: dts: stm32f429: Adopt STM32F4 clock driver Date: Wed, 10 Jun 2015 21:09:38 +0100 Message-Id: <1433966978-24422-4-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 2.4.2 In-Reply-To: <1433966978-24422-1-git-send-email-daniel.thompson@linaro.org> References: <1432327273-6810-1-git-send-email-daniel.thompson@linaro.org> <1433966978-24422-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150610_131019_335570_9B944DDD X-CRM114-Status: GOOD ( 10.73 ) X-Spam-Score: -0.7 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Daniel Thompson , linaro-kernel@lists.linaro.org, Russell King , Pawel Moll , Ian Campbell , patches@linaro.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Kamil Lulko , Rob Herring , Maxime Coquelin , Kumar Gala , Andreas Farber , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP New bindings and driver have been created for STM32F42xxx series parts. This patch integrates these changes. Note: Earlier device tree blobs (those without st,stm32f42xxx compatibles for the rcc) could still be used to boot basic systems. Such systems rely on the bootloader to configure the clock gates for vital periperhals. Signed-off-by: Daniel Thompson Reviewed-by: Maxime Coquelin --- arch/arm/boot/dts/stm32f429-disco.dts | 4 ++ arch/arm/boot/dts/stm32f429.dtsi | 79 +++++++++++------------------------ 2 files changed, 28 insertions(+), 55 deletions(-) diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts index 17cbb83..97028da 100644 --- a/arch/arm/boot/dts/stm32f429-disco.dts +++ b/arch/arm/boot/dts/stm32f429-disco.dts @@ -66,6 +66,10 @@ }; }; +&clk_hse { + clock-frequency = <8000000>; +}; + &usart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index ef6d382..748b886 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -49,48 +49,10 @@ / { clocks { - clk_sysclk: clk-sysclk { + clk_hse: clk-hse { #clock-cells = <0>; compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_hclk: clk-hclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_pclk1: clk-pclk1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <42000000>; - }; - - clk_pclk2: clk-pclk2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <84000000>; - }; - - clk_pmtr1: clk-pmtr1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <84000000>; - }; - - clk_pmtr2: clk-pmtr2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_systick: clk-systick { - compatible = "fixed-factor-clock"; - clocks = <&clk_hclk>; - #clock-cells = <0>; - clock-div = <8>; - clock-mult = <1>; + clock-frequency = <0>; }; }; @@ -99,7 +61,7 @@ compatible = "st,stm32-timer"; reg = <0x40000000 0x400>; interrupts = <28>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 128>; status = "disabled"; }; @@ -107,7 +69,7 @@ compatible = "st,stm32-timer"; reg = <0x40000400 0x400>; interrupts = <29>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 129>; status = "disabled"; }; @@ -115,7 +77,7 @@ compatible = "st,stm32-timer"; reg = <0x40000800 0x400>; interrupts = <30>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 130>; status = "disabled"; }; @@ -123,7 +85,7 @@ compatible = "st,stm32-timer"; reg = <0x40000c00 0x400>; interrupts = <50>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 131>; status = "disabled"; }; @@ -131,7 +93,7 @@ compatible = "st,stm32-timer"; reg = <0x40001000 0x400>; interrupts = <54>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 132>; status = "disabled"; }; @@ -139,7 +101,7 @@ compatible = "st,stm32-timer"; reg = <0x40001400 0x400>; interrupts = <55>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 133>; status = "disabled"; }; @@ -147,7 +109,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004400 0x400>; interrupts = <38>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 145>; status = "disabled"; }; @@ -155,7 +117,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004800 0x400>; interrupts = <39>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 146>; status = "disabled"; }; @@ -163,7 +125,7 @@ compatible = "st,stm32-uart"; reg = <0x40004c00 0x400>; interrupts = <52>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 147>; status = "disabled"; }; @@ -171,7 +133,7 @@ compatible = "st,stm32-uart"; reg = <0x40005000 0x400>; interrupts = <53>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 148>; status = "disabled"; }; @@ -179,7 +141,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007800 0x400>; interrupts = <82>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 158>; status = "disabled"; }; @@ -187,7 +149,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007c00 0x400>; interrupts = <83>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 159>; status = "disabled"; }; @@ -195,7 +157,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011000 0x400>; interrupts = <37>; - clocks = <&clk_pclk2>; + clocks = <&rcc 0 164>; status = "disabled"; }; @@ -203,13 +165,20 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011400 0x400>; interrupts = <71>; - clocks = <&clk_pclk2>; + clocks = <&rcc 0 165>; status = "disabled"; }; + + rcc: rcc@40023810 { + #clock-cells = <2>; + compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; + reg = <0x40023800 0x400>; + clocks = <&clk_hse>; + }; }; }; &systick { - clocks = <&clk_systick>; + clocks = <&rcc 1 0>; status = "okay"; };