From patchwork Mon Jun 15 19:07:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Long X-Patchwork-Id: 6611811 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E4D5CC0020 for ; Mon, 15 Jun 2015 19:10:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E47B220776 for ; Mon, 15 Jun 2015 19:10:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DF9ED205C6 for ; Mon, 15 Jun 2015 19:10:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z4Zjo-0006Cp-He; Mon, 15 Jun 2015 19:08:04 +0000 Received: from mail-qg0-f42.google.com ([209.85.192.42]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z4ZjJ-0005Z7-VG for linux-arm-kernel@lists.infradead.org; Mon, 15 Jun 2015 19:07:35 +0000 Received: by qgf75 with SMTP id 75so30213217qgf.1 for ; Mon, 15 Jun 2015 12:07:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oby4nnvSM7xY+ax2bJEH5Jflcszydg7QiqwaCfl0XbA=; b=QoiNGmJbyfR347hXfW7+2Ja9bdvgM5PIuI33I2xXG9zKDZOQEdjkps0viccRaIhfu1 +LwgRR74yd1kBd2+Ru2L7WN6MAFtW1gXyVZ6MpQ3oGojiDop0TLiQIZKtWlegVd34NL7 7fSRQ5xRR0WbzfqczEptM2xqRjIWua7ZZnLUcGkM01NoLYRBfxR9WY24sFnLTSCCadee VmLfufAZ3aCD8G3Kp9bhRTNyADdmKRII8MDu7+IEkLawllJurWqjQpwQ8rKVcajNvKcP 100FcE6ghuStUfC2yKPvkZ6Z3r6AVhgUKqXnlzV4IBZOGl9bLBL0mWicoFQu8xhWuglp vvzQ== X-Gm-Message-State: ALoCoQklwS9Nh2gyNPvPYibrM30WaZXl+41VtIQv9NPbipe2z7yvwuvbP8g1eUVldQNWxeFg9oLW X-Received: by 10.55.17.93 with SMTP id b90mr38412624qkh.63.1434395232417; Mon, 15 Jun 2015 12:07:12 -0700 (PDT) Received: from localhost.localdomain (pool-72-71-243-249.cncdnh.fast00.myfairpoint.net. [72.71.243.249]) by mx.google.com with ESMTPSA id 6sm6748404qks.37.2015.06.15.12.07.11 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 15 Jun 2015 12:07:11 -0700 (PDT) From: David Long To: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, Russell King Subject: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature Date: Mon, 15 Jun 2015 15:07:03 -0400 Message-Id: <1434395229-6654-2-git-send-email-dave.long@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1434395229-6654-1-git-send-email-dave.long@linaro.org> References: <1434395229-6654-1-git-send-email-dave.long@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150615_120734_161093_B447DBBB X-CRM114-Status: GOOD ( 15.27 ) X-Spam-Score: -0.7 (/) Cc: "Jon Medhurst \(Tixy\)" , Steve Capper , Ananth N Mavinakayanahalli , linux-kernel@vger.kernel.org, Anil S Keshavamurthy , Masami Hiramatsu , Mark Brown , sandeepa.s.prabhu@gmail.com, William Cohen , davem@davemloft.net X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "David A. Long" Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64. Signed-off-by: David A. Long --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/ptrace.h | 25 +++++++++++++ arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7796af4..966091f 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -68,6 +68,7 @@ config ARM64 select HAVE_PERF_EVENTS select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP + select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RCU_TABLE_FREE select HAVE_SYSCALL_TRACEPOINTS select IRQ_DOMAIN diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index d6dd9fd..8f440e9 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -118,6 +118,8 @@ struct pt_regs { u64 syscallno; }; +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64)) + #define arch_has_single_step() (1) #ifdef CONFIG_COMPAT @@ -146,6 +148,29 @@ struct pt_regs { #define user_stack_pointer(regs) \ (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp) +/** + * regs_get_register() - get register value from its offset + * @regs: pt_regs from which register value is gotten + * @offset: offset number of the register. + * + * regs_get_register returns the value of a register whose offset from @regs. + * The @offset is the offset of the register in struct pt_regs. + * If @offset is bigger than MAX_REG_OFFSET, this returns 0. + */ +static inline u64 regs_get_register(struct pt_regs *regs, + unsigned int offset) +{ + if (unlikely(offset > MAX_REG_OFFSET)) + return 0; + return *(u64 *)((u64)regs + offset); +} + +/* Valid only for Kernel mode traps. */ +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) +{ + return regs->sp; +} + static inline unsigned long regs_return_value(struct pt_regs *regs) { return regs->regs[0]; diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index d882b83..f6199a5 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -48,6 +48,83 @@ #define CREATE_TRACE_POINTS #include +#define ARM_pstate pstate +#define ARM_pc pc +#define ARM_sp sp +#define ARM_x30 regs[30] +#define ARM_x29 regs[29] +#define ARM_x28 regs[28] +#define ARM_x27 regs[27] +#define ARM_x26 regs[26] +#define ARM_x25 regs[25] +#define ARM_x24 regs[24] +#define ARM_x23 regs[23] +#define ARM_x22 regs[22] +#define ARM_x21 regs[21] +#define ARM_x20 regs[20] +#define ARM_x19 regs[19] +#define ARM_x18 regs[18] +#define ARM_x17 regs[17] +#define ARM_x16 regs[16] +#define ARM_x15 regs[15] +#define ARM_x14 regs[14] +#define ARM_x13 regs[13] +#define ARM_x12 regs[12] +#define ARM_x11 regs[11] +#define ARM_x10 regs[10] +#define ARM_x9 regs[9] +#define ARM_x8 regs[8] +#define ARM_x7 regs[7] +#define ARM_x6 regs[6] +#define ARM_x5 regs[5] +#define ARM_x4 regs[4] +#define ARM_x3 regs[3] +#define ARM_x2 regs[2] +#define ARM_x1 regs[1] +#define ARM_x0 regs[0] + +#define REG_OFFSET_NAME(r) \ + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)} +#define REG_OFFSET_END {.name = NULL, .offset = 0} + +const struct pt_regs_offset regs_offset_table[] = { + REG_OFFSET_NAME(x0), + REG_OFFSET_NAME(x1), + REG_OFFSET_NAME(x2), + REG_OFFSET_NAME(x3), + REG_OFFSET_NAME(x4), + REG_OFFSET_NAME(x5), + REG_OFFSET_NAME(x6), + REG_OFFSET_NAME(x7), + REG_OFFSET_NAME(x8), + REG_OFFSET_NAME(x9), + REG_OFFSET_NAME(x10), + REG_OFFSET_NAME(x11), + REG_OFFSET_NAME(x12), + REG_OFFSET_NAME(x13), + REG_OFFSET_NAME(x14), + REG_OFFSET_NAME(x15), + REG_OFFSET_NAME(x16), + REG_OFFSET_NAME(x17), + REG_OFFSET_NAME(x18), + REG_OFFSET_NAME(x19), + REG_OFFSET_NAME(x20), + REG_OFFSET_NAME(x21), + REG_OFFSET_NAME(x22), + REG_OFFSET_NAME(x23), + REG_OFFSET_NAME(x24), + REG_OFFSET_NAME(x25), + REG_OFFSET_NAME(x26), + REG_OFFSET_NAME(x27), + REG_OFFSET_NAME(x28), + REG_OFFSET_NAME(x29), + REG_OFFSET_NAME(x30), + REG_OFFSET_NAME(sp), + REG_OFFSET_NAME(pc), + REG_OFFSET_NAME(pstate), + REG_OFFSET_END, +}; + /* * TODO: does not yet catch signals sent when the child dies. * in exit.c or in signal.c.