From patchwork Wed Jun 24 09:21:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 6666551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 58A9CC05AC for ; Wed, 24 Jun 2015 09:29:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6B2D120569 for ; Wed, 24 Jun 2015 09:29:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CD7E2057E for ; Wed, 24 Jun 2015 09:29:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z7gxg-0002xZ-CB; Wed, 24 Jun 2015 09:27:16 +0000 Received: from mail-pa0-f50.google.com ([209.85.220.50]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z7gxB-0002kU-QG for linux-arm-kernel@lists.infradead.org; Wed, 24 Jun 2015 09:26:46 +0000 Received: by paceq1 with SMTP id eq1so25525879pac.3 for ; Wed, 24 Jun 2015 02:26:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XI6QePuuUN7zeENkDBTS47j/NUKkDvR16UvANq/VHHo=; b=W+h2fHhMnWXYx8NWQHea9K70RnGt1iMvGJuAesocOgFuvzUhE/4YUIeFsZWsP6TIhL /X0pZH1zGiluMdJ5nCwSKH2BsST46ZHq4n5EoHoOvq8oXHieN+5AlHoX7XnOCldheJqs QHLU3te0rB50TTo0ylR2EEe15Bpvl6oZSnRXSChadaGgxNfzor8ZKUweSnXxGKmxOIUr I/rtxJ/0zpVuCcojA9OpHif1L8WMGiUyie9sdr5VbHTDRb7FOVqvZo++k7F3TC/dusZ/ AAJpEfUe7nEm9iGAjvWLPmQJ11uYAUB8xGNsOrQ5qDSXoPXSYSMmwa7wfk2L8F78hUlP 0YTA== X-Gm-Message-State: ALoCoQn+PLnWX0FcCbS5o9RNgFpd0FHrOxniNtxGuHipwT11tjuEJZH2BVi1VU8M9VadDh7O+1EP X-Received: by 10.66.190.228 with SMTP id gt4mr78940745pac.72.1435137984608; Wed, 24 Jun 2015 02:26:24 -0700 (PDT) Received: from localhost.localdomain ([202.62.77.106]) by mx.google.com with ESMTPSA id t2sm26032717pdo.81.2015.06.24.02.26.20 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 24 Jun 2015 02:26:23 -0700 (PDT) From: Vaibhav Hiremath To: linux-arm-kernel@lists.infradead.org Subject: [PATCH-v3 2/3] mfd: 88pm800: Allow configuration of interrupt clear method Date: Wed, 24 Jun 2015 14:51:12 +0530 Message-Id: <1435137673-1629-3-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1435137673-1629-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1435137673-1629-1-git-send-email-vaibhav.hiremath@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150624_022645_926026_A33DDCA2 X-CRM114-Status: GOOD ( 15.46 ) X-Spam-Score: -2.6 (--) Cc: Zhao Ye , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vaibhav Hiremath , robh+dt@kernel.org, lee.jones@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe (page 0) controls the method of clearing interrupt status of 88pm800 family of devices; 0: clear on read 1: clear on write This patch allows to configure this field, through DT. Also, as suggested by "Lee Jones" renaming DT property and variable field to appropriate name. Signed-off-by: Zhao Ye Signed-off-by: Vaibhav Hiremath --- drivers/mfd/88pm800.c | 15 ++++++++++----- include/linux/mfd/88pm80x.h | 6 ++++-- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c index 059f01a..c1a6306 100644 --- a/drivers/mfd/88pm800.c +++ b/drivers/mfd/88pm800.c @@ -376,7 +376,7 @@ static int device_irq_init_800(struct pm80x_chip *chip) { struct regmap *map = chip->regmap; unsigned long flags = IRQF_ONESHOT; - int data, mask, ret = -EINVAL; + int irq_clr_mode, mask, ret = -EINVAL; if (!map || !chip->irq) { dev_err(chip->dev, "incorrect parameters\n"); @@ -384,15 +384,16 @@ static int device_irq_init_800(struct pm80x_chip *chip) } /* - * irq_mode defines the way of clearing interrupt. it's read-clear by - * default. + * irq_clr_on_wr defines the way of clearing interrupt by + * read/write(0/1). It's read-clear by default. */ mask = PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR | PM800_WAKEUP2_INT_MASK; - data = PM800_WAKEUP2_INT_CLEAR; - ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data); + irq_clr_mode = (chip->irq_clr_on_wr) ? + PM800_WAKEUP2_INT_WRITE_CLEAR : PM800_WAKEUP2_INT_READ_CLEAR; + ret = regmap_update_bits(map, PM800_WAKEUP2, mask, irq_clr_mode); if (ret < 0) goto out; @@ -514,6 +515,7 @@ static int device_800_init(struct pm80x_chip *chip, } chip->regmap_irq_chip = &pm800_irq_chip; + chip->irq_clr_on_wr = pdata->irq_clr_on_wr; ret = device_irq_init_800(chip); if (ret < 0) { @@ -568,6 +570,9 @@ static int pm800_probe(struct i2c_client *client, dev_err(&client->dev, "failed to allocaate memory\n"); return -ENOMEM; } + + pdata->irq_clr_on_wr = of_property_read_bool(np, + "marvell,irq-clr-on-write"); } ret = pm80x_init(client); diff --git a/include/linux/mfd/88pm80x.h b/include/linux/mfd/88pm80x.h index 97cb283..94b3dcd 100644 --- a/include/linux/mfd/88pm80x.h +++ b/include/linux/mfd/88pm80x.h @@ -77,6 +77,8 @@ enum { #define PM800_WAKEUP2 (0x0E) #define PM800_WAKEUP2_INV_INT (1 << 0) #define PM800_WAKEUP2_INT_CLEAR (1 << 1) +#define PM800_WAKEUP2_INT_READ_CLEAR (0 << 1) +#define PM800_WAKEUP2_INT_WRITE_CLEAR (1 << 1) #define PM800_WAKEUP2_INT_MASK (1 << 2) #define PM800_POWER_UP_LOG (0x10) @@ -300,7 +302,7 @@ struct pm80x_chip { struct regmap_irq_chip_data *irq_data; int type; int irq; - int irq_mode; + int irq_clr_on_wr; /* '1': Clear on write, '0': Clear on read*/ unsigned long wu_flag; spinlock_t lock; }; @@ -315,7 +317,7 @@ struct pm80x_platform_data { */ struct regulator_init_data *regulators[PM800_ID_RG_MAX]; unsigned int num_regulators; - int irq_mode; /* Clear interrupt by read/write(0/1) */ + int irq_clr_on_wr; /* Clear interrupt by read/write(0/1) */ int batt_det; /* enable/disable */ int (*plat_config)(struct pm80x_chip *chip, struct pm80x_platform_data *pdata);