From patchwork Fri Jul 3 07:29:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 6713161 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 75DABC05AC for ; Fri, 3 Jul 2015 07:36:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9FBF420778 for ; Fri, 3 Jul 2015 07:35:59 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D31E5206F4 for ; Fri, 3 Jul 2015 07:35:58 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZAvTd-0007yX-Qq; Fri, 03 Jul 2015 07:33:37 +0000 Received: from mail-pd0-f172.google.com ([209.85.192.172]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZAvSx-0007x0-IJ for linux-arm-kernel@lists.infradead.org; Fri, 03 Jul 2015 07:32:56 +0000 Received: by pdbep18 with SMTP id ep18so59301414pdb.1 for ; Fri, 03 Jul 2015 00:32:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=OCNXgQXRrap8uR5jmqzV3C3gpALCHIkktYzxyZLccTE=; b=jVIF9IsfP3JG9PbEuAr0hpOoeLPg6xc0x2MyaPOEPjZqCTaqF9hu0qC5MU3nHZ87rY cZRexyjs66Em8qob0NHHb6LC8bxzs/k1qDRgTsxNZXK6B2CLplqjaLww9nyuM7L86WYa pGxmBMA2yjtsTsAgVCXdIo0vQkssnw8G68pr0Fos59mMmBkiP0qzAbWGoJTKMIcJhLgF jVKXCOwcThysAFbF5i9kiBqsAQ1puBwROxdIJhCWcyQkTqoKSHBQVcMOv1EvrGkqDMee bNxx3aROG6WWBN0mX3+5tmDb3kYQbm9tC13bNjFgqjpwyRLSLV06oVhzwZSnfOHHOnNG 1efQ== X-Gm-Message-State: ALoCoQmu7tFrczS93uLeYEwTDxYRQIvCtPsS6kFer1dlQUNZMooOW3gE2MkQmcm/hD29KaFAj1kI X-Received: by 10.70.40.164 with SMTP id y4mr74491057pdk.25.1435908752861; Fri, 03 Jul 2015 00:32:32 -0700 (PDT) Received: from localhost ([180.150.148.224]) by mx.google.com with ESMTPSA id de2sm7995765pdb.15.2015.07.03.00.32.31 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 03 Jul 2015 00:32:31 -0700 (PDT) From: Hanjun Guo To: Catalin Marinas , Will Deacon , Lorenzo Pieralisi Subject: [PATCH v2] ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry Date: Fri, 3 Jul 2015 15:29:06 +0800 Message-Id: <1435908546-11457-1-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150703_003255_632647_84C17888 X-CRM114-Status: GOOD ( 12.82 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-acpi@vger.kernel.org, Hanjun Guo , linux-arm-kernel@lists.infradead.org, Mark Salter MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 ebabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later. Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable. So that's not an error for disabled cpus in MADT, we can switch pr_err() to pr_debug() to make the boot a little quieter by default. Since hwid for disabled cpus often are invalid, and we check invalid hwid fisrt in the code, for use case that hot add cpus later will be filtered out and will not be counted in possible cups, so move this check before the hwid one to prepare the code to count for disabeld cpus when cpu hot-plug is introduced. Signed-off-by: Hanjun Guo --- arch/arm64/kernel/smp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 4b2121b..49d00da 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -396,13 +396,13 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) { u64 hwid = processor->arm_mpidr; - if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { - pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); + if (!(processor->flags & ACPI_MADT_ENABLED)) { + pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); return; } - if (!(processor->flags & ACPI_MADT_ENABLED)) { - pr_err("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); + if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { + pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); return; }