From patchwork Thu Jul 9 11:47:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 6755261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7D74A9F319 for ; Thu, 9 Jul 2015 11:52:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AE2762077D for ; Thu, 9 Jul 2015 11:52:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BF3D720763 for ; Thu, 9 Jul 2015 11:52:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZDALQ-0004dU-W3; Thu, 09 Jul 2015 11:50:25 +0000 Received: from mail-pa0-f45.google.com ([209.85.220.45]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZDALB-0003F8-TF for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2015 11:50:10 +0000 Received: by pacws9 with SMTP id ws9so151054221pac.0 for ; Thu, 09 Jul 2015 04:49:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OQ2xGobPxPRHlUw+LvcQpFPrI/G+u39+PHwx6kHVKYA=; b=cl5NBZl99H/VottgaPfc+oeHihfofhfwy0Fv8x6hfOIhUZysEErKGEG/1tIT7YWqge QnMjH/4pHlQFhzYm/YseMCvlRuGI/qYJ1QeyyN4v5FajdIzBdvonk0v+0RHGxm/vNOay s9cBd4XZJJqAcEWaz7R9K9DmjjzrsCaNbMsWdjqsiPuqFbPEtDO1AuEJF2kalDm1Mcto BZ6XBXGlNKN9r16ezo+7igCcJcYH54KYiZKhjuhArAIt73xjHc8IERASn4uBE4V+shKE OjQySKSvBjE9ESWtgJqHvBGllCPFHSyt9agAubN9MFTApoI04eenKS5jC4CniHDGHYPR 4l9Q== X-Gm-Message-State: ALoCoQnPjNhZe0DIu4GO7uhhPteAOo/OyN30n+ZKsoLdAwS9KCg01ImHsAlF2s5vbWMOMLf5bJ5O X-Received: by 10.70.134.133 with SMTP id pk5mr30773926pdb.133.1436442589203; Thu, 09 Jul 2015 04:49:49 -0700 (PDT) Received: from localhost.localdomain ([202.62.77.106]) by smtp.gmail.com with ESMTPSA id qo1sm5709802pbc.89.2015.07.09.04.49.44 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Jul 2015 04:49:48 -0700 (PDT) From: Vaibhav Hiremath To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] mfd: 88pm800: Enable 32KHZ XO low jitter clock out Date: Thu, 9 Jul 2015 17:17:09 +0530 Message-Id: <1436442431-3471-5-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436442431-3471-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1436442431-3471-1-git-send-email-vaibhav.hiremath@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150709_045009_970947_A177935D X-CRM114-Status: GOOD ( 14.44 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, k.kozlowski@samsung.com, sameo@linux.intel.com, linux-kernel@vger.kernel.org, Vaibhav Hiremath , robh+dt@kernel.org, lee.jones@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP 88PM800/860 device supports output of 32KHz low jitter XO clock out on - CLK32K3 - for 88pm800 - CLK32K2 - for 88pm860 Both devices share same register bit-field to configure this. This patch adds support to enable this clock out, using DT property "marvell,88pm800-32khz-xolj-out-en" Since this configuration is controlled through DT property, it is safe to put it as common code. Signed-off-by: Vaibhav Hiremath --- drivers/mfd/88pm800.c | 13 +++++++++++++ include/linux/mfd/88pm80x.h | 1 + 2 files changed, 14 insertions(+) diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c index 80a1bc1..8930fd8 100644 --- a/drivers/mfd/88pm800.c +++ b/drivers/mfd/88pm800.c @@ -526,6 +526,19 @@ static int pm800_init_config(struct pm80x_chip *chip, struct device_node *np) int ret; unsigned int val; + /* Enable 32Khz-out-3 low jitter XO_LJ = 1 in pm800 + * Enable 32Khz-out-2 low jitter XO_LJ = 1 in pm860 + * they are the same bit + */ + if (of_property_read_bool(np, "marvell,88pm800-32khz-xolj-out-en")) { + ret = regmap_update_bits(chip->regmap, + PM800_LOW_POWER2, + PM800_XO_LJ_OUT_EN, + PM800_XO_LJ_OUT_EN); + if (ret) + goto error; + } + switch (chip->type) { case CHIP_PM800: case CHIP_PM805: diff --git a/include/linux/mfd/88pm80x.h b/include/linux/mfd/88pm80x.h index 2ef62af..fb916f1 100644 --- a/include/linux/mfd/88pm80x.h +++ b/include/linux/mfd/88pm80x.h @@ -88,6 +88,7 @@ enum { /* Referance and low power registers */ #define PM800_LOW_POWER1 (0x20) #define PM800_LOW_POWER2 (0x21) +#define PM800_XO_LJ_OUT_EN BIT(5) #define PM800_LOW_POWER_CONFIG3 (0x22) #define PM800_LDOBK_FREEZE BIT(7)