From patchwork Wed Jul 22 01:29:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ray Jui X-Patchwork-Id: 6838991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A15359F38B for ; Wed, 22 Jul 2015 01:31:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BA8672061F for ; Wed, 22 Jul 2015 01:31:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CB7C62061C for ; Wed, 22 Jul 2015 01:31:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZHirF-0002bj-C5; Wed, 22 Jul 2015 01:30:05 +0000 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZHir0-0002Jw-Ua for linux-arm-kernel@lists.infradead.org; Wed, 22 Jul 2015 01:29:51 +0000 X-IronPort-AV: E=Sophos;i="5.15,520,1432623600"; d="scan'208";a="70420477" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 21 Jul 2015 18:47:55 -0700 Received: from IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.235.1; Tue, 21 Jul 2015 18:29:31 -0700 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) with Microsoft SMTP Server id 14.3.235.1; Tue, 21 Jul 2015 18:29:31 -0700 Received: from mail.broadcom.com (unknown [10.136.8.49]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 38DCD40FE6; Tue, 21 Jul 2015 18:27:20 -0700 (PDT) From: Ray Jui To: Catalin Marinas , Will Deacon , Arnd Bergmann , Mark Rutland , Bjorn Helgaas , Hauke Mehrtens Subject: [PATCH v4 1/4] PCI: iproc: enable arm64 support for iProc PCIe Date: Tue, 21 Jul 2015 18:29:40 -0700 Message-ID: <1437528583-855-2-git-send-email-rjui@broadcom.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1437528583-855-1-git-send-email-rjui@broadcom.com> References: <1437528583-855-1-git-send-email-rjui@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150721_182951_058441_7BCA5605 X-CRM114-Status: GOOD ( 14.13 ) X-Spam-Score: -5.4 (-----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ray Jui Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch enables arm64 support to the iProc PCIe driver Note struct pci_sys_data is arm32 specific and will eventually be removed. This change is done in such a way that when struct pci_sys_data is removed from arm32, one only needs to also remove it from pcie-iproc.h, no other change in the iProc PCIe core driver is needed In addition, arm64 based PCI driver does not require call to pci_fixup_irqs, as it implements OF based irq parsing and mapping in pcibios_add_device Signed-off-by: Ray Jui Reviewed-by: Scott Branden --- drivers/pci/host/pcie-iproc.c | 15 ++++----------- drivers/pci/host/pcie-iproc.h | 8 ++++++-- 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c index d77481e..8a556d5 100644 --- a/drivers/pci/host/pcie-iproc.c +++ b/drivers/pci/host/pcie-iproc.c @@ -58,11 +58,6 @@ #define SYS_RC_INTX_EN 0x330 #define SYS_RC_INTX_MASK 0xf -static inline struct iproc_pcie *sys_to_pcie(struct pci_sys_data *sys) -{ - return sys->private_data; -} - /** * Note access to the configuration registers are protected at the higher layer * by 'pci_lock' in drivers/pci/access.c @@ -71,8 +66,7 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus, unsigned int devfn, int where) { - struct pci_sys_data *sys = bus->sysdata; - struct iproc_pcie *pcie = sys_to_pcie(sys); + struct iproc_pcie *pcie = bus->sysdata; unsigned slot = PCI_SLOT(devfn); unsigned fn = PCI_FUNC(devfn); unsigned busno = bus->number; @@ -208,10 +202,7 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) iproc_pcie_reset(pcie); - pcie->sysdata.private_data = pcie; - - bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops, - &pcie->sysdata, res); + bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops, pcie, res); if (!bus) { dev_err(pcie->dev, "unable to create PCI root bus\n"); ret = -ENOMEM; @@ -229,7 +220,9 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) pci_scan_child_bus(bus); pci_assign_unassigned_bus_resources(bus); +#ifdef CONFIG_ARM pci_fixup_irqs(pci_common_swizzle, pcie->map_irq); +#endif pci_bus_add_devices(bus); return 0; diff --git a/drivers/pci/host/pcie-iproc.h b/drivers/pci/host/pcie-iproc.h index ba0a108..0ee9673 100644 --- a/drivers/pci/host/pcie-iproc.h +++ b/drivers/pci/host/pcie-iproc.h @@ -18,18 +18,22 @@ /** * iProc PCIe device + * @sysdata: Per PCI controller data. This needs to be kept at the beginning of + * struct iproc_pcie, to enable support of both ARM32 and ARM64 platforms with + * minimal changes in the iProc PCIe core driver * @dev: pointer to device data structure * @base: PCIe host controller I/O register base * @resources: linked list of all PCI resources - * @sysdata: Per PCI controller data * @root_bus: pointer to root bus * @phy: optional PHY device that controls the Serdes * @irqs: interrupt IDs */ struct iproc_pcie { +#ifdef CONFIG_ARM + struct pci_sys_data sysdata; +#endif struct device *dev; void __iomem *base; - struct pci_sys_data sysdata; struct pci_bus *root_bus; struct phy *phy; int irqs[IPROC_PCIE_MAX_NUM_IRQS];