From patchwork Wed Jul 29 10:08:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 6891831 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C3C02C05AC for ; Wed, 29 Jul 2015 10:12:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 756B8207A2 for ; Wed, 29 Jul 2015 10:12:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 898372079C for ; Wed, 29 Jul 2015 10:12:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZKOK3-0001FD-Jj; Wed, 29 Jul 2015 10:10:51 +0000 Received: from mail-pd0-f182.google.com ([209.85.192.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZKOJa-0007sF-AK for linux-arm-kernel@lists.infradead.org; Wed, 29 Jul 2015 10:10:24 +0000 Received: by pdbnt7 with SMTP id nt7so3559235pdb.0 for ; Wed, 29 Jul 2015 03:10:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9QT/ILyJx0E+UjqnwmwDhyBHiNwHJcyATnXVwyBPV6k=; b=VLAJKBEIMAEVtzv+wywtpji/Q862DWA6PpOFclqFdIiLyzZw/qUpHSTd3m2jMrBJV5 8MlD4ox6Nj9GdC3Jk2964VrOTtGx2v6hoFaAHpMudWlePXERYLOJVJGOEOwzZ7SSrXQc h99uVIOlU7PnR7q4dSggbqk4JAQSJDRMEcIx+mixbvdMAlowlG02Ey9riLfJJ07i22Ep G0+v64zCucAZPEEP3gOD3JQj3FLaMzW/7BJ/i+TWrnKyiFa2qnIvMezXpWCCNND5+ATS AUZHk1/GFdvBbvtcHOL/iAv+xEP2/L/lS2vFgNHcbPi2lOyb/lTtUFhHx5v/9Ri1xYfa 8Ubg== X-Gm-Message-State: ALoCoQm89iUd0ZnYh9+dX5iEyT+CKHeTnHebzBa0UmYXWEa0lfupmXjOIihJCgSf1W/Fga9/wIVM X-Received: by 10.70.42.134 with SMTP id o6mr91518590pdl.11.1438164601346; Wed, 29 Jul 2015 03:10:01 -0700 (PDT) Received: from localhost ([180.150.157.4]) by smtp.googlemail.com with ESMTPSA id oi17sm39811539pdb.74.2015.07.29.03.09.59 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 29 Jul 2015 03:10:00 -0700 (PDT) From: Hanjun Guo To: Marc Zyngier , Jason Cooper , Will Deacon , Catalin Marinas , "Rafael J. Wysocki" Subject: [PATCH v4 03/10] irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code Date: Wed, 29 Jul 2015 18:08:52 +0800 Message-Id: <1438164539-29256-4-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438164539-29256-1-git-send-email-hanjun.guo@linaro.org> References: <1438164539-29256-1-git-send-email-hanjun.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150729_031022_578456_5050923E X-CRM114-Status: GOOD ( 14.51 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Wei Huang , Lorenzo Pieralisi , linux-acpi@vger.kernel.org, Timur Tabi , linaro-acpi@lists.linaro.org, linux-kernel@vger.kernel.org, Tomasz Nowicki , Grant Likely , Mark Brown , Hanjun Guo , Suravee Suthikulpanit , Bjorn Helgaas , Thomas Gleixner , Jiang Liu , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As the ACPI self-probe infrastructure for irqchip is ready, we use the infrastructure to simplify GICv2 init code. acpi_irqchip_init() is renamed as acpi_irq_init() to replace the previous hardcode version of acpi_irq_init() in asm/irq.h, also cleanup the code which previously calling the GIC driver manually in arch/arm64/kernel/acpi.c. From now on, GIC init calls reside in their drivers only. This means the code becomes cleaner and it is not spread outside irqchip driver. Signed-off-by: Hanjun Guo --- arch/arm64/include/asm/irq.h | 13 ------------- arch/arm64/kernel/acpi.c | 25 ------------------------- drivers/irqchip/irq-gic-acpi.c | 2 +- drivers/irqchip/irq-gic.c | 3 ++- include/linux/acpi_irq.h | 4 +++- include/linux/irqchip/arm-gic-acpi.h | 9 +-------- 6 files changed, 7 insertions(+), 49 deletions(-) diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h index bbb251b..94c5367 100644 --- a/arch/arm64/include/asm/irq.h +++ b/arch/arm64/include/asm/irq.h @@ -1,8 +1,6 @@ #ifndef __ASM_IRQ_H #define __ASM_IRQ_H -#include - #include struct pt_regs; @@ -10,15 +8,4 @@ struct pt_regs; extern void migrate_irqs(void); extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); -static inline void acpi_irq_init(void) -{ - /* - * Hardcode ACPI IRQ chip initialization to GICv2 for now. - * Proper irqchip infrastructure will be implemented along with - * incoming GICv2m|GICv3|ITS bits. - */ - acpi_gic_init(); -} -#define acpi_irq_init acpi_irq_init - #endif diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index 19de753..d6463bb 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -205,28 +205,3 @@ void __init acpi_boot_table_init(void) disable_acpi(); } } - -void __init acpi_gic_init(void) -{ - struct acpi_table_header *table; - acpi_status status; - acpi_size tbl_size; - int err; - - if (acpi_disabled) - return; - - status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size); - if (ACPI_FAILURE(status)) { - const char *msg = acpi_format_exception(status); - - pr_err("Failed to get MADT table, %s\n", msg); - return; - } - - err = gic_v2_acpi_init(table); - if (err) - pr_err("Failed to initialize GIC IRQ controller"); - - early_acpi_os_unmap_memory((char *)table, tbl_size); -} diff --git a/drivers/irqchip/irq-gic-acpi.c b/drivers/irqchip/irq-gic-acpi.c index 011468d..95454e3 100644 --- a/drivers/irqchip/irq-gic-acpi.c +++ b/drivers/irqchip/irq-gic-acpi.c @@ -119,7 +119,7 @@ irqchip_acpi_match_end __used __section(__irqchip_acpi_table_end); extern struct acpi_table_id __irqchip_acpi_table[]; -void __init acpi_irqchip_init(void) +void __init acpi_irq_init(void) { struct acpi_table_id *id; diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index ce531e6..bec6b00 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1109,7 +1109,7 @@ static int gic_acpi_gsi_desc_populate(struct acpi_gsi_descriptor *data, return 0; } -int __init +static int __init gic_v2_acpi_init(struct acpi_table_header *table) { void __iomem *cpu_base, *dist_base; @@ -1163,4 +1163,5 @@ gic_v2_acpi_init(struct acpi_table_header *table) gic_acpi_gsi_desc_populate); return 0; } +IRQCHIP_ACPI_DECLARE(gic_v2, ACPI_MADT_GIC_VERSION_V2, gic_v2_acpi_init); #endif diff --git a/include/linux/acpi_irq.h b/include/linux/acpi_irq.h index f10c872..4c0e108 100644 --- a/include/linux/acpi_irq.h +++ b/include/linux/acpi_irq.h @@ -3,7 +3,9 @@ #include -#ifndef acpi_irq_init +#ifdef CONFIG_ACPI +void acpi_irq_init(void); +#else static inline void acpi_irq_init(void) { } #endif diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h index 13bc676..56cd82c 100644 --- a/include/linux/irqchip/arm-gic-acpi.h +++ b/include/linux/irqchip/arm-gic-acpi.h @@ -21,12 +21,5 @@ #define ACPI_GIC_CPU_IF_MEM_SIZE (SZ_8K) #define ACPI_GICV3_DIST_MEM_SIZE (SZ_64K) -struct acpi_table_header; - -int gic_v2_acpi_init(struct acpi_table_header *table); -void acpi_gic_init(void); -#else -static inline void acpi_gic_init(void) { } -#endif - +#endif /* CONFIG_ACPI */ #endif /* ARM_GIC_ACPI_H_ */