| Message ID | 1438792366-2737-5-git-send-email-lina.iyer@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 7084010..900ef1f 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -59,7 +59,7 @@ }; L2: l2-cache { - compatible = "qcom,arch-cache"; + compatible = "cache"; cache-level = <2>; qcom,saw = <&saw_l2>; }; @@ -183,7 +183,7 @@ }; saw_l2: power-controller@f9012000 { - compatible = "qcom,saw2"; + compatible = "qcom,apq8084-saw2-v2.1-l2", "qcom,saw2"; reg = <0xf9012000 0x1000>; regulator; };
Add power controller (SAW) device nodes for L2 caches. L2 SAW enable L2 to enter idle states and be powered off. Also, on 8084 the L2 SAW may be used to regulate the active voltage for the cpu and L2. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> --- arch/arm/boot/dts/qcom-apq8084.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)