From patchwork Thu Aug 6 10:37:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 6958201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AEEEDC05AC for ; Thu, 6 Aug 2015 10:48:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C74E820569 for ; Thu, 6 Aug 2015 10:48:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D6B082053B for ; Thu, 6 Aug 2015 10:48:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZNIfz-0006zF-Tn; Thu, 06 Aug 2015 10:45:31 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZNIb7-0008Mz-6z for linux-arm-kernel@lists.infradead.org; Thu, 06 Aug 2015 10:40:33 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 3D3BD1415A9; Thu, 6 Aug 2015 10:40:12 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 2DCB91415A3; Thu, 6 Aug 2015 10:40:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from blr-ubuntu-34.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 485CC141482; Thu, 6 Aug 2015 10:40:02 +0000 (UTC) From: Rajendra Nayak To: sboyd@codeaurora.org, mturquette@baylibre.com Subject: [PATCH v8 12/13] clk: qcom: gdsc: Enable an RCG before turing on the gdsc Date: Thu, 6 Aug 2015 16:07:53 +0530 Message-Id: <1438857474-20262-13-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org> References: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150806_034029_501779_AAC78E83 X-CRM114-Status: GOOD ( 17.35 ) X-Spam-Score: -2.0 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rajendra Nayak , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, svarbanov@mm-sol.com, srinivas.kandagatla@linaro.org, sviau@codeaurora.org, georgi.djakov@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Some gdsc instances require a certain root clock (RCG) to be turned on *before* the power domain itself can be turned on. Handle this as part of the gdsc enable/disable callbacks. Signed-off-by: Rajendra Nayak --- drivers/clk/qcom/gcc-msm8916.c | 1 + drivers/clk/qcom/gdsc.c | 14 ++++++++++++-- drivers/clk/qcom/gdsc.h | 4 ++++ 3 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index 10ba745..bb34345 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -2601,6 +2601,7 @@ static struct gdsc oxili_gdsc = { .name = "oxili", }, .pwrsts = PWRSTS_OFF_ON, + .root_clock = GFX3D_CLK_SRC, }; static struct clk_regmap *gcc_msm8916_clocks[] = { diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index ec1dfb5..20965fc 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -131,6 +131,9 @@ static int gdsc_enable(struct generic_pm_domain *domain) if (sc->pwrsts == PWRSTS_ON) return gdsc_deassert_reset(sc); + if (sc->root_clk) + clk_prepare_enable(sc->root_clk); + ret = gdsc_toggle_logic(sc, true); if (ret) return ret; @@ -152,6 +155,7 @@ static int gdsc_enable(struct generic_pm_domain *domain) static int gdsc_disable(struct generic_pm_domain *domain) { + int ret; struct gdsc *sc = domain_to_gdsc(domain); if (sc->pwrsts == PWRSTS_ON) @@ -160,7 +164,12 @@ static int gdsc_disable(struct generic_pm_domain *domain) if (sc->pwrsts & PWRSTS_OFF) gdsc_clear_mem_on(sc); - return gdsc_toggle_logic(sc, false); + ret = gdsc_toggle_logic(sc, false); + + if (sc->root_clk) + clk_disable_unprepare(sc->root_clk); + + return ret; } static inline bool match(unsigned int id, unsigned int *ids, unsigned int count) @@ -200,7 +209,8 @@ static int gdsc_attach(struct generic_pm_domain *domain, struct device *dev) sc->clks[j] = of_clk_get_from_provider(&clkspec); pm_clk_add_clk(dev, sc->clks[j]); j++; - } + } else if (clkspec.args[0] == sc->root_clock) + sc->root_clk = of_clk_get_from_provider(&clkspec); i++; } return 0; diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 2fdb332..0b958a6 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -42,6 +42,8 @@ struct reset_controller_dev; * @clocks: ids of clocks associated with the gdsc * @clock_count: number of @clocks * @clks: clock pointers to gdsc clocks + * @root_clock: id of the root clock to be enabled + * @root_clk: root clk pointer */ struct gdsc { struct generic_pm_domain pd; @@ -56,6 +58,8 @@ struct gdsc { unsigned int *clocks; unsigned int clock_count; struct clk **clks; + unsigned int root_clock; + struct clk *root_clk; }; #ifdef CONFIG_QCOM_GDSC