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Tue, 11 Aug 2015 12:46:28 +0900 (KST) From: Chanwoo Choi To: s.nawrocki@samsung.com, tomasz.figa@gmail.com, kgene@kernel.org, k.kozlowski@samsung.com Subject: [PATCH 3/4] ARM: dts: Add UART2 dt node for Exynos3250 SoC Date: Tue, 11 Aug 2015 12:46:23 +0900 Message-id: <1439264784-30322-4-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.5.5 In-reply-to: <1439264784-30322-1-git-send-email-cw00.choi@samsung.com> References: <1439264784-30322-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNLMWRmVeSWpSXmKPExsWyRsSkSFe04GSowcU/bBbXvzxntZh/5Byr xesXhhb9j18zW2x6fI3V4mPPPVaLy7vmsFnMOL+PyeLiKVeLw2/aWS1+nOlmsVi16w+jA4/H +xut7B6X+3qZPHbOusvusWlVJ5vH5iX1Hn1bVjF6fN4kF8AexWWTkpqTWZZapG+XwJWxfOkJ toJLvBXnVl1lbWBs5u5i5OCQEDCRuD07vYuRE8gUk7hwbz1bFyMXh5DACkaJO5e+sUIkTCRe 75/JBJGYxShx+vJ+RgjnC6PEh60H2UCq2AS0JPa/uMEGMlVEIE6ioU8IpIZZ4A2jxJMJ7Ywg NcICzhJvr/xhAbFZBFQljvR8B9vAK+AqserrWRaIbQoSy5bPBItzCrhJHL7RygRiCwHV3DnS ywwyVELgHLtEx9aZTBCDBCS+TT7EAvGOrMSmA8wQcyQlDq64wTKBUXgBI8MqRtHUguSC4qT0 IhO94sTc4tK8dL3k/NxNjMA4Of3v2YQdjPcOWB9iFOBgVOLhFfA8GSrEmlhWXJl7iNEUaMNE ZinR5HxgNOaVxBsamxlZmJqYGhuZW5opifO+lvoZLCSQnliSmp2aWpBaFF9UmpNafIiRiYNT qoFxcm+r4KqYArPlq4Qs16ear1H6F6fKbRyyU++i9eJ1ConRi1wm3dX/9rzTc+axI8IPHXwu tYrK7F5jfSZE6kvQvGapldm1f+c+lC3kXpQ7dY7FCqOj5bf3bVfR0mfWCo8wPf2F8d2JpsW6 E7tnbHF5yvJBymyu8Uch02de73lSvzVPmv2/9VGjEktxRqKhFnNRcSIA28TH/44CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJIsWRmVeSWpSXmKPExsVy+t9jQV3RgpOhBtvfMFpc//Kc1WL+kXOs Fq9fGFr0P37NbLHp8TVWi48991gtLu+aw2Yx4/w+JouLp1wtDr9pZ7X4caabxWLVrj+MDjwe 72+0sntc7utl8tg56y67x6ZVnWwem5fUe/RtWcXo8XmTXAB7VAOjTUZqYkpqkUJqXnJ+SmZe uq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqtkotPgK5bZg7QnUoKZYk5pUChgMTiYiV9O0wTQkPc dC1gGiN0fUOC4HqMDNBAwhrGjOVLT7AVXOKtOLfqKmsDYzN3FyMnh4SAicTr/TOZIGwxiQv3 1rN1MXJxCAnMYpQ4fXk/I4TzhVHiw9aDbCBVbAJaEvtf3ACyOThEBOIkGvqEQGqYBd4wSjyZ 0M4IUiMs4Czx9sofFhCbRUBV4kjPd1YQm1fAVWLV17MsENsUJJYtnwkW5xRwkzh8oxXsCiGg mjtHepknMPIuYGRYxSiRWpBcUJyUnmuYl1quV5yYW1yal66XnJ+7iREcjc+kdjAe3OV+iFGA g1GJh1fA82SoEGtiWXFl7iFGCQ5mJRHeV05AId6UxMqq1KL8+KLSnNTiQ4ymQIdNZJYSTc4H Joq8knhDYxMzI0sjc0MLI2NzJXFe2Q2bQ4UE0hNLUrNTUwtSi2D6mDg4pRoYy5eHfE0RVWj7 MkX1wwZBsby1s6zvvopc83UxW2RM3Ypf2xU9T2bsb/FU2J0ud0G1fIXItD1XOr/3Tp6VKD1h XYKfzZk6sV5Z57Zf7B8KWl7JftcQYMgSU/41yfvcxM02jlNXPeNZffjztqSL8y0SWDO3LM7a e4XB5VH42yWLxQzOsS5ySZzepcRSnJFoqMVcVJwIANif4tbcAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150810_204653_874343_1D038FC4 X-CRM114-Status: GOOD ( 10.60 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, cw00.choi@samsung.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add the uart2 devicetree node for Exynos3250 SoC. Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos3250.dtsi | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 5ab81c39e2c9..eac1d21c10d4 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -120,6 +120,13 @@ samsung,pin-drv = <0>; }; + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c3_bus: i2c3-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 2db99433e17f..02f3250766c9 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -42,6 +42,7 @@ i2c7 = &i2c_7; serial0 = &serial_0; serial1 = &serial_1; + serial2 = &serial_2; }; cpus { @@ -435,6 +436,17 @@ status = "disabled"; }; + serial_2: serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x100>; + interrupts = <0 111 0>; + clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + status = "disabled"; + }; + i2c_0: i2c@13860000 { #address-cells = <1>; #size-cells = <0>;