From patchwork Wed Aug 19 23:02:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 7039861 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2C9DC9F695 for ; Wed, 19 Aug 2015 23:05:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4ED5A2081C for ; Wed, 19 Aug 2015 23:05:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2430A20840 for ; Wed, 19 Aug 2015 23:05:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZSCOB-0004bl-Dm; Wed, 19 Aug 2015 23:03:23 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZSCO2-0004XX-H9 for linux-arm-kernel@lists.infradead.org; Wed, 19 Aug 2015 23:03:14 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 0E5B1141062; Wed, 19 Aug 2015 23:02:55 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id F1B97141064; Wed, 19 Aug 2015 23:02:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from timur-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: timur@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 09BC2141062; Wed, 19 Aug 2015 23:02:53 +0000 (UTC) From: Timur Tabi To: Will Deacon , Dave Martin , Stephen Boyd , linux-arm-kernel@lists.infradead.org, abhimany@codeaurora.org Subject: [PATCH 3/3] [v2] hvc_dcc: disable user-space access to DCC Date: Wed, 19 Aug 2015 18:02:50 -0500 Message-Id: <1440025370-9519-3-git-send-email-timur@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1440025370-9519-1-git-send-email-timur@codeaurora.org> References: <1440025370-9519-1-git-send-email-timur@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150819_160314_605370_E9896869 X-CRM114-Status: GOOD ( 13.77 ) X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP If the DCC driver loads, then disable user-space access to the DCC so that we don't have two entities trying to access the DCC at the same time. Signed-off-by: Timur Tabi --- arch/arm/include/asm/dcc.h | 15 +++++++++++++++ arch/arm64/include/asm/dcc.h | 11 +++++++++++ drivers/tty/hvc/hvc_dcc.c | 2 ++ 3 files changed, 28 insertions(+) diff --git a/arch/arm/include/asm/dcc.h b/arch/arm/include/asm/dcc.h index b74899d..c50056b 100644 --- a/arch/arm/include/asm/dcc.h +++ b/arch/arm/include/asm/dcc.h @@ -9,8 +9,11 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#ifndef __ASM_DCC_H +#define __ASM_DCC_H #include +#include static inline u32 __dcc_getstatus(void) { @@ -39,3 +42,15 @@ static inline void __dcc_putchar(char c) : "r" (c)); isb(); } + +static inline void __dcc_initialize(void) +{ + u32 val; + + /* Disable user-space access to DCC */ + val = MRC14(0, c0, c1, 0); + val |= 1 << 12; /* DSCR[Comms] */ + MCR14(val, 0, c0, c1, 0); +} + +#endif diff --git a/arch/arm64/include/asm/dcc.h b/arch/arm64/include/asm/dcc.h index 65e0190..cff9512 100644 --- a/arch/arm64/include/asm/dcc.h +++ b/arch/arm64/include/asm/dcc.h @@ -52,4 +52,15 @@ static inline void __dcc_putchar(char c) isb(); } +static inline void __dcc_initialize(void) +{ + u32 val; + + /* Disable user-space access to DCC */ + asm volatile ("mrs %0, mdscr_el1\n" + " orr %0, %0, #4096\n" /* Set the TDCC bit */ + " msr mdscr_el1, %0\n" + : "=r" (val)); +} + #endif diff --git a/drivers/tty/hvc/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c index 82f240f..14d4a473 100644 --- a/drivers/tty/hvc/hvc_dcc.c +++ b/drivers/tty/hvc/hvc_dcc.c @@ -75,6 +75,8 @@ static int __init hvc_dcc_console_init(void) if (!hvc_dcc_check()) return -ENODEV; + __dcc_initialize(); + /* Returns -1 if error */ ret = hvc_instantiate(0, 0, &hvc_dcc_get_put_ops);