From patchwork Thu Aug 27 08:21:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yalin wang X-Patchwork-Id: 7081571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 120E2BEEC1 for ; Thu, 27 Aug 2015 08:24:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2747C2099F for ; Thu, 27 Aug 2015 08:24:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F9E920829 for ; Thu, 27 Aug 2015 08:24:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZUsRU-0002RI-VG; Thu, 27 Aug 2015 08:21:52 +0000 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZUsRS-0002QC-NK for linux-arm-kernel@lists.infradead.org; Thu, 27 Aug 2015 08:21:51 +0000 Received: by pacti10 with SMTP id ti10so18156843pac.0 for ; Thu, 27 Aug 2015 01:21:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id; bh=uHSRCZxq3AXrRqTkCLr100px2uUgMrAklA8M925dGgI=; b=WqHzhNBG6U2utYy797yHb3qlBZCIIloodE6uFr1XR9UYtlxHfrStxlAct5unjp34sd QFEtAz3BnHSys+mzfwxJ8XxJfeAP0wPNGtwy11Y547pHQ4bRpPyHkSwfrIkmj/G+wO0/ i7UbU4Ozgli1ZrGOWMZPeFu6uWAgtmM5dPlc2YgUpJWA7OBFuyCvBZzqg+nYdFAacOl7 7yCF38yDq4ncXn7IdtwKlFnrB2+urnIXPQpN9a0ZfEvKtD699KTBCN2sprZhXUpEOGLu Cua6RndlJdnsJOKqCsxS2vR7MxD0iJGqLdx159bgaW7EFyre7nssojQgim+lu8EMOCK5 YoVA== X-Received: by 10.68.202.72 with SMTP id kg8mr4721465pbc.42.1440663689394; Thu, 27 Aug 2015 01:21:29 -0700 (PDT) Received: from ubuntu.localdomain ([17.87.20.100]) by smtp.googlemail.com with ESMTPSA id qv3sm1491828pbb.78.2015.08.27.01.21.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 27 Aug 2015 01:21:28 -0700 (PDT) From: yalin wang To: catalin.marinas@arm.com, will.deacon@arm.com, Liviu.Dudau@arm.com, treding@nvidia.com, mark.rutland@arm.com, toshi.kani@hp.com, andre.przywara@arm.com, orca.chen@gmail.com, michal.simek@xilinx.com, yalin.wang2010@gmail.com, steve.capper@linaro.org, keescook@chromium.org, lauraa@codeaurora.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: ioremap: change ioremap prototype and add ioremap_cache macro Date: Thu, 27 Aug 2015 16:21:00 +0800 Message-Id: <1440663660-24244-1-git-send-email-yalin.wang2010@gmail.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150827_012150_791853_B0C2D899 X-CRM114-Status: GOOD ( 12.35 ) X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch change ioremap_*() first parameter type to resource_size_t to be the same as other platforms, and add ioremap_cache macro, because some code will test if this macro is defined or not, and will generate a generric version if not defined, for example, memremap.c do like this. Signed-off-by: yalin wang --- arch/arm64/include/asm/io.h | 5 +++-- arch/arm64/mm/ioremap.c | 6 +++--- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 44be1e0..500e09f 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -163,15 +163,16 @@ extern void __memset_io(volatile void __iomem *, int, size_t); /* * I/O memory mapping functions. */ -extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot); +extern void __iomem *__ioremap(resource_size_t phys_addr, size_t size, pgprot_t prot); extern void __iounmap(volatile void __iomem *addr); -extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); +extern void __iomem *ioremap_cache(resource_size_t phys_addr, size_t size); #define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) #define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) #define ioremap_wt(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) #define iounmap __iounmap +#define ioremap_cache ioremap_cache /* * io{read,write}{16,32}be() macros diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c index 01e88c8..082e963 100644 --- a/arch/arm64/mm/ioremap.c +++ b/arch/arm64/mm/ioremap.c @@ -29,7 +29,7 @@ #include #include -static void __iomem *__ioremap_caller(phys_addr_t phys_addr, size_t size, +static void __iomem *__ioremap_caller(resource_size_t phys_addr, size_t size, pgprot_t prot, void *caller) { unsigned long last_addr; @@ -73,7 +73,7 @@ static void __iomem *__ioremap_caller(phys_addr_t phys_addr, size_t size, return (void __iomem *)(offset + addr); } -void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot) +void __iomem *__ioremap(resource_size_t phys_addr, size_t size, pgprot_t prot) { return __ioremap_caller(phys_addr, size, prot, __builtin_return_address(0)); @@ -93,7 +93,7 @@ void __iounmap(volatile void __iomem *io_addr) } EXPORT_SYMBOL(__iounmap); -void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size) +void __iomem *ioremap_cache(resource_size_t phys_addr, size_t size) { /* For normal memory we already have a cacheable mapping. */ if (pfn_valid(__phys_to_pfn(phys_addr)))