From patchwork Thu Aug 27 16:39:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 7086031 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8B5F3BEEC1 for ; Thu, 27 Aug 2015 16:42:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A287A2096A for ; Thu, 27 Aug 2015 16:42:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C3C6320949 for ; Thu, 27 Aug 2015 16:42:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZV0DU-0002FP-V2; Thu, 27 Aug 2015 16:39:56 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZV0DL-00025O-Em for linux-arm-kernel@lists.infradead.org; Thu, 27 Aug 2015 16:39:48 +0000 Received: from dude.hi.4.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1ZV0Cx-00033b-DM; Thu, 27 Aug 2015 18:39:23 +0200 From: Lucas Stach To: Shawn Guo Subject: [PATCH 6/8] clk: imx5: retain early UART clocks during kernel init Date: Thu, 27 Aug 2015 18:39:19 +0200 Message-Id: <1440693561-28095-7-git-send-email-l.stach@pengutronix.de> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1440693561-28095-1-git-send-email-l.stach@pengutronix.de> References: <1440693561-28095-1-git-send-email-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150827_093947_700910_5FE19E07 X-CRM114-Status: UNSURE ( 9.98 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -3.3 (---) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Turquette , Stephen Boyd , patchwork-lst@pengutronix.de, kernel@pengutronix.de, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach --- drivers/clk/imx/clk-imx51-imx53.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c index a7e4f394be0d..701d1d912a4b 100644 --- a/drivers/clk/imx/clk-imx51-imx53.c +++ b/drivers/clk/imx/clk-imx51-imx53.c @@ -130,6 +130,20 @@ static const char *cpu_podf_sels[] = { "pll1_sw", "step_sel" }; static struct clk *clk[IMX5_CLK_END]; static struct clk_onecell_data clk_data; +static void __init imx5_uart_disable_cb(void) +{ + clk_disable_unprepare(clk[IMX5_CLK_UART1_IPG_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART1_PER_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART2_IPG_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART2_PER_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART3_IPG_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART3_PER_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART4_IPG_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART4_PER_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART5_IPG_GATE]); + clk_disable_unprepare(clk[IMX5_CLK_UART5_PER_GATE]); +} + static void __init mx5_clocks_common_init(void __iomem *ccm_base) { clk[IMX5_CLK_DUMMY] = imx_clk_fixed("dummy", 0); @@ -310,6 +324,20 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base) clk_prepare_enable(clk[IMX5_CLK_TMAX1]); clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */ clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */ + + if (imx_clk_keep_uart()) { + clk_prepare_enable(clk[IMX5_CLK_UART1_IPG_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART1_PER_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART2_IPG_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART2_PER_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART3_IPG_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART3_PER_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART4_IPG_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART4_PER_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART5_IPG_GATE]); + clk_prepare_enable(clk[IMX5_CLK_UART5_PER_GATE]); + imx_clk_set_uart_disable_callback(imx5_uart_disable_cb); + } } static void __init mx50_clocks_init(struct device_node *np)