From patchwork Sat Aug 29 16:46:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Guinot X-Patchwork-Id: 7095471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D14399F358 for ; Sat, 29 Aug 2015 16:51:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6A12B2083C for ; Sat, 29 Aug 2015 16:51:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E28DF2083E for ; Sat, 29 Aug 2015 16:51:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZVjI1-000621-CZ; Sat, 29 Aug 2015 16:47:37 +0000 Received: from vm1.sequanux.org ([188.165.36.56]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZVjHh-0005yf-BG for linux-arm-kernel@lists.infradead.org; Sat, 29 Aug 2015 16:47:19 +0000 Received: from localhost (localhost.localdomain [127.0.0.1]) by vm1.sequanux.org (Postfix) with ESMTP id C6C161080A3; Sat, 29 Aug 2015 18:46:48 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at vm1.sequanux.org Received: from vm1.sequanux.org ([127.0.0.1]) by localhost (vm1.sequanux.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Am_PlGHLVVzv; Sat, 29 Aug 2015 18:46:47 +0200 (CEST) Received: from localhost (stp25-2-82-234-233-9.fbx.proxad.net [82.234.233.9]) by vm1.sequanux.org (Postfix) with ESMTPSA id D0C8110892B; Sat, 29 Aug 2015 18:46:46 +0200 (CEST) From: Simon Guinot To: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth Subject: [PATCH 1/3] ARM: mvebu: add DT support for Seagate NAS 2 and 4-Bay Date: Sat, 29 Aug 2015 18:46:43 +0200 Message-Id: <1440866805-31731-2-git-send-email-simon.guinot@sequanux.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1440866805-31731-1-git-send-email-simon.guinot@sequanux.org> References: <1440866805-31731-1-git-send-email-simon.guinot@sequanux.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150829_094717_934874_A432ABE9 X-CRM114-Status: GOOD ( 15.90 ) X-Spam-Score: -2.9 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yoann Sculo , Vincent Donnefort , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vincent Donnefort This patch adds DT support for the Seagate NAS 2 and 4-Bay (n090201 and n090401). Chipset list (common): - SoC Marvell Armada 370 88F6707, CPU @1.2GHz - SDRAM memory: 512MB DDR3 600MHz (16-bits bandwidth) - NAND flash 256MB, 8-bits (Micron MT29F2G08AAB or Hinyx H27U2G8F2CTR-BC) - 2 SATA II ports (SoC) - 1 Ethernet Gigabit ports (PHY Marvell 88E1518) - 2 USB3 host ports (PCIe controller ASM1042) - GPIO fan (4 speeds) - External I2C RTC (MCP7940NT) - 3 push buttons (power, backup and reset) - 2 SATA LEDs (bi-color, blue and red) - 1 power LED (bi-color, blue and red) Only on 4-Bay models: - 2 extra SATA III ports (PCIe AHCI controller Marvell 88SE9170) - 1 extra Ethernet Gigabit ports (PHY Marvell 88E1518) - I2C GPIO expander (PCA9554A) - 2 extra SATA LEDs (bi-color, blue and red) Note that support for the white SATA LEDs associated with HDDs 0 and 1 is missing. A dedicated LED driver is needed. Signed-off-by: Vincent Donnefort --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/armada-370-n090201.dts | 28 ++++ arch/arm/boot/dts/armada-370-n090401.dts | 124 ++++++++++++++++ arch/arm/boot/dts/armada-370-n090x01.dtsi | 232 ++++++++++++++++++++++++++++++ 4 files changed, 386 insertions(+) create mode 100644 arch/arm/boot/dts/armada-370-n090201.dts create mode 100644 arch/arm/boot/dts/armada-370-n090401.dts create mode 100644 arch/arm/boot/dts/armada-370-n090x01.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 233159d2eaab..0a46613e90d2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -699,6 +699,8 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ armada-370-db.dtb \ armada-370-dlink-dns327l.dtb \ armada-370-mirabox.dtb \ + armada-370-n090201.dtb \ + armada-370-n090401.dtb \ armada-370-netgear-rn102.dtb \ armada-370-netgear-rn104.dtb \ armada-370-rd.dtb \ diff --git a/arch/arm/boot/dts/armada-370-n090201.dts b/arch/arm/boot/dts/armada-370-n090201.dts new file mode 100644 index 000000000000..b92b1ee067d6 --- /dev/null +++ b/arch/arm/boot/dts/armada-370-n090201.dts @@ -0,0 +1,28 @@ +/* + * Device Tree file for Seagate NAS 2-Bay (n090201) + * + * Copyright (C) 2015 Seagate + * + * Author: Vincent Donnefort + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +#include "armada-370-n090x01.dtsi" + +/ { + model = "Seagate NAS 2-Bay"; + compatible = "seagate,n090201", "marvell,armada370", "marvell,armada-370-xp"; + + gpio-fan { + gpio-fan,speed-map = + < 0 3 + 950 2 + 1400 1 + 1800 0>; + }; +}; diff --git a/arch/arm/boot/dts/armada-370-n090401.dts b/arch/arm/boot/dts/armada-370-n090401.dts new file mode 100644 index 000000000000..c36f10f0eb04 --- /dev/null +++ b/arch/arm/boot/dts/armada-370-n090401.dts @@ -0,0 +1,124 @@ +/* + * Device Tree file for Seagate NAS 4-Bay + * + * Copyright (C) 2015 Seagate + * + * Author: Vincent Donnefort + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "armada-370-n090x01.dtsi" +#include + +/ { + model = "Seagate NAS 4-Bay"; + compatible = "seagate,n090401", "marvell,armada370", "marvell,armada-370-xp"; + + soc { + pcie-controller { + /* SATA AHCI controller 88SE9170 */ + pcie@1,0 { + status = "okay"; + }; + }; + + internal-regs { + mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + ethernet@74000 { + status = "okay"; + pinctrl-0 = <&ge1_rgmii_pins>; + pinctrl-names = "default"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + + i2c@11000 { + /* I2C GPIO expander (PCA9554A) */ + pca9554: pca9554@21 { + compatible = "nxp,pca9554"; + reg = <0x21>; + #gpio-cells = <2>; + gpio-controller; + }; + }; + }; + }; + + regulators { + regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "SATA2 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>; + }; + regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "SATA3 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + red-sata2 { + label = "n090x01:red:sata2"; + gpios = <&pca9554 0 GPIO_ACTIVE_LOW>; + }; + red-sata3 { + label = "n090x01:red:sata3"; + gpios = <&pca9554 3 GPIO_ACTIVE_LOW>; + }; + }; + + leds-ns2 { + compatible = "lacie,ns2-leds"; + + white-sata2 { + label = "n090x01:white:sata2"; + cmd-gpio = <&pca9554 1 GPIO_ACTIVE_HIGH>; + slow-gpio = <&pca9554 2 GPIO_ACTIVE_HIGH>; + num-modes = <4>; + modes-map = ; + }; + white-sata3 { + label = "n090x01:white:sata3"; + cmd-gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>; + slow-gpio = <&pca9554 5 GPIO_ACTIVE_HIGH>; + num-modes = <4>; + modes-map = ; + }; + }; + + gpio-fan { + gpio-fan,speed-map = + < 0 3 + 800 2 + 1050 1 + 1300 0>; + }; +}; diff --git a/arch/arm/boot/dts/armada-370-n090x01.dtsi b/arch/arm/boot/dts/armada-370-n090x01.dtsi new file mode 100644 index 000000000000..6142136f2db5 --- /dev/null +++ b/arch/arm/boot/dts/armada-370-n090x01.dtsi @@ -0,0 +1,232 @@ +/* + * Device Tree common file for the Seagate NAS 2 and 4-bay + * (n090201 and n090401). + * + * Copyright (C) 2015 Seagate + * + * Author: Vincent Donnefort + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/* + * TODO: add support for the white SATA LEDs associated with HDD 0 and 1. + */ + +#include "armada-370.dtsi" +#include +#include + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; /* 512 MB */ + }; + + soc { + ranges = ; + + pcie-controller { + status = "okay"; + + /* USB 3.0 bridge ASM1042A */ + pcie@2,0 { + status = "okay"; + }; + }; + + internal-regs { + serial@12000 { + status = "okay"; + }; + + sata@a0000 { + nr-ports = <2>; + status = "okay"; + }; + + mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + + ethernet@70000 { + status = "okay"; + pinctrl-0 = <&ge0_rgmii_pins>; + pinctrl-names = "default"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + i2c@11000 { + status = "okay"; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + + /* RTC - NXP 8563T (second source) */ + rtc: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + interrupts = <110>; + }; + /* RTC - MCP7940NT */ + rtc: rtc@6f { + compatible = "microchip,mcp7941x"; + reg = <0x6f>; + interrupts = <110>; + }; + }; + + nand@d0000 { + status = "okay"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x300000>; + }; + partition@300000 { + label = "device-tree"; + reg = <0x300000 0x20000>; + }; + partition@320000 { + label = "linux"; + reg = <0x320000 0x2000000>; + }; + partition@2320000 { + label = "rootfs"; + reg = <0x2320000 0xdce0000>; + }; + }; + }; + + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "SATA0 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; + }; + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "SATA1 power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-fan { + compatible = "gpio-fan"; + gpios = <&gpio2 0 0 + &gpio2 1 0>; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@1 { + label = "Power button"; + linux,code = ; + gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + button@2 { + label = "Backup button"; + linux,code = ; + gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + button@3 { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + white-power { + label = "n090x01:white:power"; + gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "timer"; + + }; + red-power { + label = "n090x01:red:power"; + gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; + }; + red-sata0 { + label = "n090x01:red:sata0"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + red-sata1 { + label = "n090x01:red:sata1"; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>; + pinctrl-names = "default"; + + hdd0_led_sata_pin: hdd0-led-sata-pin { + marvell,pins = "mpp48"; + marvell,function = "sata1"; + }; + hdd0_led_gpio_pin: hdd0-led-gpio-pin { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + hdd1_led_sata_pin: hdd1-led-sata-pin { + marvell,pins = "mpp57"; + marvell,function = "sata0"; + }; + hdd1_led_gpio_pin: hdd1-led-gpio-pin { + marvell,pins = "mpp57"; + marvell,function = "gpio"; + }; +};