From patchwork Tue Sep 1 19:24:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 7106621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 875E29F1CD for ; Tue, 1 Sep 2015 19:29:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 873C8205BE for ; Tue, 1 Sep 2015 19:29:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9454A205D1 for ; Tue, 1 Sep 2015 19:29:51 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZWrDP-0003F8-5m; Tue, 01 Sep 2015 19:27:31 +0000 Received: from mail-pa0-f52.google.com ([209.85.220.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZWrDC-00036F-2D for linux-arm-kernel@lists.infradead.org; Tue, 01 Sep 2015 19:27:18 +0000 Received: by pacfv12 with SMTP id fv12so5181604pac.2 for ; Tue, 01 Sep 2015 12:26:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cdYYIoDaGWeBuzgP7iRdTtMDOV5EmyY9aBHyp9dqQKI=; b=X1wqQL7vA6/cGDMDWzr5Vk3jxvQ0iMhwamUFSYk105BiTwSvgmXYXwBxyDAUXly46i CDgkX/GgJCgHybk28RoNwatRQsG6J1rIEd7RRyz2Ry7E4h5HrLKxgziTMODovyVwONXy 1aWiQW33JN85m4OfwwiOficl2reVb7vZvWu606mDqJed5MQmL9KdVF7DU/jhItVvYOAy PaNvKjNzvkZ5dYeVEFbxbaWmsQG49vHISEVQZ3vBJaVeBYmkKzbZtt/UMgqFP1ymp26s P3hRkUjyWB1Qy6eB517N3AD8fm6L1TwvAc00dP3F4k0tTFYm1dPaolg/jOS7L/4WSJWr d1oA== X-Gm-Message-State: ALoCoQnVTB5oqMdvuZsJxNsa+NrPIch17xeHCtS/1ljCrnTvFk/esiXCzu24Q1FY60KM1OQR4K06 X-Received: by 10.68.169.69 with SMTP id ac5mr50231658pbc.14.1441135617441; Tue, 01 Sep 2015 12:26:57 -0700 (PDT) Received: from localhost.localdomain ([202.62.93.143]) by smtp.gmail.com with ESMTPSA id kh10sm7418927pad.7.2015.09.01.12.26.54 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Sep 2015 12:26:56 -0700 (PDT) From: Vaibhav Hiremath To: linux-mmc@vger.kernel.org Subject: [PATCH 1/2] mmc: sdhci-pxav3: Fix tabbing issue Date: Wed, 2 Sep 2015 00:54:13 +0530 Message-Id: <1441135454-6902-2-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1441135454-6902-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1441135454-6902-1-git-send-email-vaibhav.hiremath@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150901_122718_136447_A7F047AE X-CRM114-Status: GOOD ( 16.34 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Vaibhav Hiremath MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There were some coding style issues where spaces have been used instead of tabs, for example, in macro definitions, alignment of function declarations/definitions, etc... This patch fixes all such occurrences in the code. And also use BIT for bit definitions. Signed-off-by: Vaibhav Hiremath --- drivers/mmc/host/sdhci-pxav3.c | 63 ++++++++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 30 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index 946d37f..d02bc37 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -39,24 +39,29 @@ #include "sdhci.h" #include "sdhci-pltfm.h" -#define PXAV3_RPM_DELAY_MS 50 +#define PXAV3_RPM_DELAY_MS 50 -#define SD_CLOCK_BURST_SIZE_SETUP 0x10A -#define SDCLK_SEL 0x100 -#define SDCLK_DELAY_SHIFT 9 -#define SDCLK_DELAY_MASK 0x1f +#define SD_CLOCK_BURST_SIZE_SETUP 0x10A +#define SDCLK_SEL 0x100 +#define SDCLK_DELAY_SHIFT 9 +#define SDCLK_DELAY_MASK 0x1f -#define SD_CFG_FIFO_PARAM 0x100 -#define SDCFG_GEN_PAD_CLK_ON (1<<6) -#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF -#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24 +#define SD_CFG_FIFO_PARAM 0x100 +#define SDCFG_GEN_PAD_CLK_ON BIT(6) +#define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF +#define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24 -#define SD_SPI_MODE 0x108 -#define SD_CE_ATA_1 0x10C +#define SD_SPI_MODE 0x108 +#define SD_CE_ATA_1 0x10C -#define SD_CE_ATA_2 0x10E -#define SDCE_MISC_INT (1<<2) -#define SDCE_MISC_INT_EN (1<<1) +#define SD_CE_ATA_2 0x10E +#define SDCE_MISC_INT BIT(2) +#define SDCE_MISC_INT_EN BIT(1) + +/* IO Power control */ +#define IO_PWR_AKEY_ASFAR 0xbaba +#define IO_PWR_AKEY_ASSAR 0xeb10 +#define IO_PWR_MMC1_PAD_1V8 BIT(2) struct sdhci_pxa { struct clk *clk_core; @@ -128,7 +133,7 @@ static int mv_conf_mbus_windows(struct platform_device *pdev, } static int armada_38x_quirks(struct platform_device *pdev, - struct sdhci_host *host) + struct sdhci_host *host) { struct device_node *np = pdev->dev.of_node; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -136,8 +141,7 @@ static int armada_38x_quirks(struct platform_device *pdev, struct resource *res; host->quirks |= SDHCI_QUIRK_MISSING_CAPS; - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "conf-sdio3"); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "conf-sdio3"); if (res) { pxa->sdio3_conf_reg = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(pxa->sdio3_conf_reg)) @@ -284,10 +288,10 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) * FE-2946959 */ if (pxa->sdio3_conf_reg) { - u8 reg_val = readb(pxa->sdio3_conf_reg); + u8 reg_val = readb(pxa->sdio3_conf_reg); if (uhs == MMC_TIMING_UHS_SDR50 || - uhs == MMC_TIMING_UHS_DDR50) { + uhs == MMC_TIMING_UHS_DDR50) { reg_val &= ~SDIO3_CONF_CLK_INV; reg_val |= SDIO3_CONF_SD_FB_CLK; } else { @@ -304,20 +308,20 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) } static const struct sdhci_ops pxav3_sdhci_ops = { - .set_clock = sdhci_set_clock, - .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, - .get_max_clock = sdhci_pltfm_clk_get_max_clock, - .set_bus_width = sdhci_set_bus_width, - .reset = pxav3_reset, - .set_uhs_signaling = pxav3_set_uhs_signaling, + .set_clock = sdhci_set_clock, + .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, + .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = pxav3_reset, + .set_uhs_signaling = pxav3_set_uhs_signaling, }; static struct sdhci_pltfm_data sdhci_pxav3_pdata = { - .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK + .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | SDHCI_QUIRK_32BIT_ADMA_SIZE | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, - .ops = &pxav3_sdhci_ops, + .ops = &pxav3_sdhci_ops, }; #ifdef CONFIG_OF @@ -343,7 +347,7 @@ static struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) return NULL; if (!of_property_read_u32(np, "mrvl,clk-delay-cycles", - &clk_delay_cycles)) + &clk_delay_cycles)) pdata->clk_delay_cycles = clk_delay_cycles; return pdata; @@ -433,8 +437,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev) host->mmc->pm_caps |= pdata->pm_caps; if (gpio_is_valid(pdata->ext_cd_gpio)) { - ret = mmc_gpio_request_cd(host->mmc, pdata->ext_cd_gpio, - 0); + ret = mmc_gpio_request_cd(host->mmc, pdata->ext_cd_gpio, 0); if (ret) { dev_err(mmc_dev(host->mmc), "failed to allocate card detect gpio\n");