From patchwork Sat Sep 12 00:07:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Daney X-Patchwork-Id: 7165751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6E818BEEC1 for ; Sat, 12 Sep 2015 00:12:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8821A2073C for ; Sat, 12 Sep 2015 00:12:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9EB962073B for ; Sat, 12 Sep 2015 00:12:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZaYMF-0007jV-M8; Sat, 12 Sep 2015 00:07:55 +0000 Received: from mail-io0-x229.google.com ([2607:f8b0:4001:c06::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZaYMC-0006ak-6i for linux-arm-kernel@lists.infradead.org; Sat, 12 Sep 2015 00:07:53 +0000 Received: by iofb144 with SMTP id b144so116066227iof.1 for ; Fri, 11 Sep 2015 17:07:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=Z8lha9vIjlTZ3Om/1t1IdCdhGTdT9+Xpsyy8mfddMSg=; b=m2UDyrmKeKao5fx+NKsG0QYVW2hfGIKxMA2O0iGA3HUXJazs32kOP52pVOCCjtWSr2 yxLM3G9WHTSl42dGFPQ1jrdg6zI8ANMlow/iapkkxuvOiW7VfhmexIbF3tK43Z7kabpN cN46T+/lqaNo133+1tRuqBLzp5wTlZcwHC0DV7dZsbW/2bEEIvDoahVHjSM7GK1agB4K vXjjeb4OYWxB73nBCT18UncGbUSAy9z+RZrHpJJFtc9tc5bHNp6ijlSqhUt0kVbCV0iu M6KZUp6QgB991h+LGBSnGU0g3Rsr6Q2hatlbnAm/jNtvfufSvIYvMQgOCSp74YCHVZ+1 Qyyg== X-Received: by 10.107.19.161 with SMTP id 33mr8947143iot.62.1442016451357; Fri, 11 Sep 2015 17:07:31 -0700 (PDT) Received: from dl.caveonetworks.com (64.2.3.194.ptr.us.xo.net. [64.2.3.194]) by smtp.gmail.com with ESMTPSA id u99sm1270123ioi.0.2015.09.11.17.07.29 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 11 Sep 2015 17:07:29 -0700 (PDT) Received: from dl.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dl.caveonetworks.com (8.14.5/8.14.5) with ESMTP id t8C07OJs007670; Fri, 11 Sep 2015 17:07:24 -0700 Received: (from ddaney@localhost) by dl.caveonetworks.com (8.14.5/8.14.5/Submit) id t8C07NrL007669; Fri, 11 Sep 2015 17:07:23 -0700 From: David Daney To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Frank Rowand , Grant Likely , Bjorn Helgaas , linux-pci@vger.kernel.org, Will Deacon , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-arm-kernel@lists.infradead.org Subject: [PATCH] PCI: generic: Add support for Cavium ThunderX PCIe root complexes. Date: Fri, 11 Sep 2015 17:07:19 -0700 Message-Id: <1442016439-7636-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.11.7 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150911_170752_395437_DDDD2B88 X-CRM114-Status: GOOD ( 17.54 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Daney MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: David Daney The config space for external PCIe root complexes on some Cavium ThunderX SoCs is very similar to CAM and ECAM, but differs in the shift values that have to be applied to the bus and devfn numbers to compose that address window offset. These root complexes also have the interesting property that there is no root bridge, so the standard manner of limiting scanning to only the first device doesn't work. We can use the standard pci-host-generic driver if we make a minor addition to handle these differences, so we... Add a mapping function for ThunderX PCIe root complexes with a bus shift of 24 and devfn shift of 16. Ignore accesses for devices other than the first device on the primary bus. Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt Signed-off-by: David Daney --- This patch depends on the set I recently sent: https://lkml.org/lkml/2015/9/11/764 .../devicetree/bindings/pci/host-generic-pci.txt | 5 +++- drivers/pci/host/pci-host-generic.c | 29 ++++++++++++++++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.txt b/Documentation/devicetree/bindings/pci/host-generic-pci.txt index daa6942..51cc1d1 100644 --- a/Documentation/devicetree/bindings/pci/host-generic-pci.txt +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.txt @@ -16,7 +16,10 @@ Properties of the host controller node: - compatible : Must be "pci-host-cam-generic" or "pci-host-ecam-generic" depending on the layout of configuration space (CAM vs - ECAM respectively). + ECAM respectively). Also supported is + "cavium,pci-host-thunder-pem" which has bus:devfn:reg in + bits 24:16:0 respectively of the PCI config space address + window. - device_type : Must be "pci". diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c index e0248b4..a392ba2 100644 --- a/drivers/pci/host/pci-host-generic.c +++ b/drivers/pci/host/pci-host-generic.c @@ -91,6 +91,32 @@ static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = { } }; +static void __iomem *gen_pci_map_cfg_bus_thunder_pem(struct pci_bus *bus, + unsigned int devfn, + int where) +{ + struct gen_pci *pci = bus->sysdata; + resource_size_t idx = bus->number - pci->cfg.bus_range->start; + + /* + * Thunder PEM is a PCIe RC, but without a root bridge. On + * the primary bus, ignore accesses for devices other than + * the first device. + */ + if (idx == 0 && (devfn & ~7u)) + return NULL; + return pci->cfg.win[idx] + ((devfn << 16) | where); +} + +static struct gen_pci_cfg_bus_ops gen_pci_cfg_thunder_pem_bus_ops = { + .bus_shift = 24, + .ops = { + .map_bus = gen_pci_map_cfg_bus_thunder_pem, + .read = pci_generic_config_read, + .write = pci_generic_config_write, + } +}; + static const struct of_device_id gen_pci_of_match[] = { { .compatible = "pci-host-cam-generic", .data = &gen_pci_cfg_cam_bus_ops }, @@ -98,6 +124,9 @@ static const struct of_device_id gen_pci_of_match[] = { { .compatible = "pci-host-ecam-generic", .data = &gen_pci_cfg_ecam_bus_ops }, + { .compatible = "cavium,pci-host-thunder-pem", + .data = &gen_pci_cfg_thunder_pem_bus_ops }, + { }, }; MODULE_DEVICE_TABLE(of, gen_pci_of_match);