| Message ID | 1442331684-28818-4-git-send-email-suzuki.poulose@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Suzuki, On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: > From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> > > Introduce helpers for finding the number of page table > levels required for a given VA width, shift for a particular > page table level. > > Convert the existing users to the new helpers. More users > to follow. > > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> > Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > --- > arch/arm64/include/asm/pgtable-hwdef.h | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > index 24154b0..ce18389 100644 > --- a/arch/arm64/include/asm/pgtable-hwdef.h > +++ b/arch/arm64/include/asm/pgtable-hwdef.h > @@ -16,13 +16,21 @@ > #ifndef __ASM_PGTABLE_HWDEF_H > #define __ASM_PGTABLE_HWDEF_H > > +/* > + * Number of page-table levels required to address 'va_bits' wide > + * address, without section mapping > + */ > +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) I don't understand the '(va_bits) - 4' here, can you explain it (and add a comment to that effect) ? > +#define ARM64_HW_PGTABLE_LEVEL_SHIFT(level) \ > + ((PAGE_SHIFT - 3) * (level) + 3) > + While this change is clearly correct, if you can explain the math here in a comment as well, that would be helpful. Thanks, -Christoffer > #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3)) > > /* > * PMD_SHIFT determines the size a level 2 page table entry can map. > */ > #if CONFIG_PGTABLE_LEVELS > 2 > -#define PMD_SHIFT ((PAGE_SHIFT - 3) * 2 + 3) > +#define PMD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(2) > #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) > #define PMD_MASK (~(PMD_SIZE-1)) > #define PTRS_PER_PMD PTRS_PER_PTE > @@ -32,7 +40,7 @@ > * PUD_SHIFT determines the size a level 1 page table entry can map. > */ > #if CONFIG_PGTABLE_LEVELS > 3 > -#define PUD_SHIFT ((PAGE_SHIFT - 3) * 3 + 3) > +#define PUD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(3) > #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) > #define PUD_MASK (~(PUD_SIZE-1)) > #define PTRS_PER_PUD PTRS_PER_PTE > @@ -42,7 +50,8 @@ > * PGDIR_SHIFT determines the size a top-level page table entry can map > * (depending on the configuration, this level can be 0, 1 or 2). > */ > -#define PGDIR_SHIFT ((PAGE_SHIFT - 3) * CONFIG_PGTABLE_LEVELS + 3) > +#define PGDIR_SHIFT \ > + ARM64_HW_PGTABLE_LEVEL_SHIFT(CONFIG_PGTABLE_LEVELS) > #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) > #define PGDIR_MASK (~(PGDIR_SIZE-1)) > #define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT)) > -- > 1.7.9.5 > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
On 07/10/15 09:26, Christoffer Dall wrote: > Hi Suzuki, > > On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: >> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> >> >> Introduce helpers for finding the number of page table >> levels required for a given VA width, shift for a particular >> page table level. >> >> Convert the existing users to the new helpers. More users >> to follow. >> >> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Cc: Catalin Marinas <catalin.marinas@arm.com> >> Cc: Will Deacon <will.deacon@arm.com> >> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> >> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> --- >> arch/arm64/include/asm/pgtable-hwdef.h | 15 ++++++++++++--- >> 1 file changed, 12 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h >> index 24154b0..ce18389 100644 >> --- a/arch/arm64/include/asm/pgtable-hwdef.h >> +++ b/arch/arm64/include/asm/pgtable-hwdef.h >> @@ -16,13 +16,21 @@ >> #ifndef __ASM_PGTABLE_HWDEF_H >> #define __ASM_PGTABLE_HWDEF_H >> >> +/* >> + * Number of page-table levels required to address 'va_bits' wide >> + * address, without section mapping >> + */ >> +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) > > I don't understand the '(va_bits) - 4' here, can you explain it (and add a > comment to that effect) ? I just had a chat with Catalin, who did shed some light on this. It all has to do with rounding up. What you would like to have here is: #define ARM64_HW_PGTABLE_LEVELS(va_bits) DIV_ROUND_UP(va_bits - PAGE_SHIFT, PAGE_SHIFT - 3) where (va_bits - PAGE_SHIFT) is the total number of bits we deal with during a page table walk, and (PAGE_SHIFT - 3) is the number of bits we deal with per level. The clue is in how DIV_ROUND_UP is written: #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) which gives you Suzuki's magic formula. I'd vote for the DIV_ROUND_UP(), which will make things a lot more readable. M.
On 07/10/15 10:26, Marc Zyngier wrote: > On 07/10/15 09:26, Christoffer Dall wrote: >> Hi Suzuki, >> >> On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: >>> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> >>> >>> Introduce helpers for finding the number of page table >>> levels required for a given VA width, shift for a particular >>> page table level. >>> >>> Convert the existing users to the new helpers. More users >>> to follow. >>> >>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> >>> Cc: Mark Rutland <mark.rutland@arm.com> >>> Cc: Catalin Marinas <catalin.marinas@arm.com> >>> Cc: Will Deacon <will.deacon@arm.com> >>> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> >>> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >>> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >>> --- >>> arch/arm64/include/asm/pgtable-hwdef.h | 15 ++++++++++++--- >>> 1 file changed, 12 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h >>> index 24154b0..ce18389 100644 >>> --- a/arch/arm64/include/asm/pgtable-hwdef.h >>> +++ b/arch/arm64/include/asm/pgtable-hwdef.h >>> @@ -16,13 +16,21 @@ >>> #ifndef __ASM_PGTABLE_HWDEF_H >>> #define __ASM_PGTABLE_HWDEF_H >>> >>> +/* >>> + * Number of page-table levels required to address 'va_bits' wide >>> + * address, without section mapping >>> + */ >>> +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) >> >> I don't understand the '(va_bits) - 4' here, can you explain it (and add a >> comment to that effect) ? > > I just had a chat with Catalin, who did shed some light on this. > It all has to do with rounding up. What you would like to have here is: > > #define ARM64_HW_PGTABLE_LEVELS(va_bits) DIV_ROUND_UP(va_bits - PAGE_SHIFT, PAGE_SHIFT - 3) > > where (va_bits - PAGE_SHIFT) is the total number of bits we deal > with during a page table walk, and (PAGE_SHIFT - 3) is the number > of bits we deal with per level. > > The clue is in how DIV_ROUND_UP is written: > > #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) > > which gives you Suzuki's magic formula. Thanks Marc for pitching in. That explains it better. > > I'd vote for the DIV_ROUND_UP(), which will make things a lot more readable. Sure, I can change that. Suzuki
On 07/10/15 09:26, Christoffer Dall wrote: > Hi Suzuki, > > On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: >> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> >> >> Introduce helpers for finding the number of page table >> levels required for a given VA width, shift for a particular >> page table level. >> >> Convert the existing users to the new helpers. More users >> to follow. >> >> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Cc: Catalin Marinas <catalin.marinas@arm.com> >> Cc: Will Deacon <will.deacon@arm.com> >> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> >> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> --- >> arch/arm64/include/asm/pgtable-hwdef.h | 15 ++++++++++++--- >> 1 file changed, 12 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h >> index 24154b0..ce18389 100644 >> --- a/arch/arm64/include/asm/pgtable-hwdef.h >> +++ b/arch/arm64/include/asm/pgtable-hwdef.h >> @@ -16,13 +16,21 @@ >> #ifndef __ASM_PGTABLE_HWDEF_H >> #define __ASM_PGTABLE_HWDEF_H >> >> +/* >> + * Number of page-table levels required to address 'va_bits' wide >> + * address, without section mapping >> + */ >> +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) > > I don't understand the '(va_bits) - 4' here, can you explain it (and add a > comment to that effect) ? As mentioned, I will change it to DIV_ROUND_UP() as suggested by Marc. > >> +#define ARM64_HW_PGTABLE_LEVEL_SHIFT(level) \ >> + ((PAGE_SHIFT - 3) * (level) + 3) >> + > > While this change is clearly correct, if you can explain the math here > in a comment as well, that would be helpful. Sure, will add a comment to that effect. Suzuki
On Wed, Oct 07, 2015 at 10:26:14AM +0100, Marc Zyngier wrote: > On 07/10/15 09:26, Christoffer Dall wrote: > > Hi Suzuki, > > > > On Tue, Sep 15, 2015 at 04:41:12PM +0100, Suzuki K. Poulose wrote: > >> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com> > >> > >> Introduce helpers for finding the number of page table > >> levels required for a given VA width, shift for a particular > >> page table level. > >> > >> Convert the existing users to the new helpers. More users > >> to follow. > >> > >> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > >> Cc: Mark Rutland <mark.rutland@arm.com> > >> Cc: Catalin Marinas <catalin.marinas@arm.com> > >> Cc: Will Deacon <will.deacon@arm.com> > >> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> > >> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > >> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > >> --- > >> arch/arm64/include/asm/pgtable-hwdef.h | 15 ++++++++++++--- > >> 1 file changed, 12 insertions(+), 3 deletions(-) > >> > >> diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > >> index 24154b0..ce18389 100644 > >> --- a/arch/arm64/include/asm/pgtable-hwdef.h > >> +++ b/arch/arm64/include/asm/pgtable-hwdef.h > >> @@ -16,13 +16,21 @@ > >> #ifndef __ASM_PGTABLE_HWDEF_H > >> #define __ASM_PGTABLE_HWDEF_H > >> > >> +/* > >> + * Number of page-table levels required to address 'va_bits' wide > >> + * address, without section mapping > >> + */ > >> +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) > > > > I don't understand the '(va_bits) - 4' here, can you explain it (and add a > > comment to that effect) ? > > I just had a chat with Catalin, who did shed some light on this. > It all has to do with rounding up. What you would like to have here is: > > #define ARM64_HW_PGTABLE_LEVELS(va_bits) DIV_ROUND_UP(va_bits - PAGE_SHIFT, PAGE_SHIFT - 3) > > where (va_bits - PAGE_SHIFT) is the total number of bits we deal > with during a page table walk, and (PAGE_SHIFT - 3) is the number > of bits we deal with per level. > > The clue is in how DIV_ROUND_UP is written: > > #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) > > which gives you Suzuki's magic formula. > > I'd vote for the DIV_ROUND_UP(), which will make things a lot more readable. > Thanks for the explanation, I vote for DIV_ROUND_UP too. You can stash this away for a cryptic interview question ;) -Christoffer
On 08/10/15 15:45, Christoffer Dall wrote: > On Wed, Oct 07, 2015 at 10:26:14AM +0100, Marc Zyngier wrote: >> On 07/10/15 09:26, Christoffer Dall wrote: >>> Hi Suzuki, >>> >> I just had a chat with Catalin, who did shed some light on this. >> It all has to do with rounding up. What you would like to have here is: >> >> #define ARM64_HW_PGTABLE_LEVELS(va_bits) DIV_ROUND_UP(va_bits - PAGE_SHIFT, PAGE_SHIFT - 3) >> >> where (va_bits - PAGE_SHIFT) is the total number of bits we deal >> with during a page table walk, and (PAGE_SHIFT - 3) is the number >> of bits we deal with per level. >> >> The clue is in how DIV_ROUND_UP is written: >> >> #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) >> >> which gives you Suzuki's magic formula. >> >> I'd vote for the DIV_ROUND_UP(), which will make things a lot more readable. >> > Thanks for the explanation, I vote for DIV_ROUND_UP too. Btw, DIV_ROUND_UP is defined in linux/kernel.h, including which in the required headers breaks the build. I could add the definition of the same locally. > > You can stash this away for a cryptic interview question ;) ;) Suzuki
On Thu, Oct 08, 2015 at 06:22:34PM +0100, Suzuki K. Poulose wrote: > On 08/10/15 15:45, Christoffer Dall wrote: > >On Wed, Oct 07, 2015 at 10:26:14AM +0100, Marc Zyngier wrote: > >>I just had a chat with Catalin, who did shed some light on this. > >>It all has to do with rounding up. What you would like to have here is: > >> > >>#define ARM64_HW_PGTABLE_LEVELS(va_bits) DIV_ROUND_UP(va_bits - PAGE_SHIFT, PAGE_SHIFT - 3) > >> > >>where (va_bits - PAGE_SHIFT) is the total number of bits we deal > >>with during a page table walk, and (PAGE_SHIFT - 3) is the number > >>of bits we deal with per level. > >> > >>The clue is in how DIV_ROUND_UP is written: > >> > >>#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) > >> > >>which gives you Suzuki's magic formula. > >> > >>I'd vote for the DIV_ROUND_UP(), which will make things a lot more readable. > >> > >Thanks for the explanation, I vote for DIV_ROUND_UP too. > > Btw, DIV_ROUND_UP is defined in linux/kernel.h, including which in the required > headers breaks the build. I could add the definition of the same locally. Or just keep the original magic formula and add the DIV_ROUND_UP one in a comment.
On 08/10/15 18:28, Catalin Marinas wrote: > On Thu, Oct 08, 2015 at 06:22:34PM +0100, Suzuki K. Poulose wrote: >> On 08/10/15 15:45, Christoffer Dall wrote: >>> On Wed, Oct 07, 2015 at 10:26:14AM +0100, Marc Zyngier wrote: >>>> I just had a chat with Catalin, who did shed some light on this. >>>> It all has to do with rounding up. What you would like to have here is: >>>> >>>> #define ARM64_HW_PGTABLE_LEVELS(va_bits) DIV_ROUND_UP(va_bits - PAGE_SHIFT, PAGE_SHIFT - 3) >>>> >>>> where (va_bits - PAGE_SHIFT) is the total number of bits we deal >>>> with during a page table walk, and (PAGE_SHIFT - 3) is the number >>>> of bits we deal with per level. >>>> >>>> The clue is in how DIV_ROUND_UP is written: >>>> >>>> #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) >>>> >>>> which gives you Suzuki's magic formula. >>>> >>>> I'd vote for the DIV_ROUND_UP(), which will make things a lot more readable. >>>> >>> Thanks for the explanation, I vote for DIV_ROUND_UP too. >> >> Btw, DIV_ROUND_UP is defined in linux/kernel.h, including which in the required >> headers breaks the build. I could add the definition of the same locally. > > Or just keep the original magic formula and add the DIV_ROUND_UP one in > a comment. > OK, will keep proper documentation with the cryptic formula ;) Suzuki
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index 24154b0..ce18389 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -16,13 +16,21 @@ #ifndef __ASM_PGTABLE_HWDEF_H #define __ASM_PGTABLE_HWDEF_H +/* + * Number of page-table levels required to address 'va_bits' wide + * address, without section mapping + */ +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) +#define ARM64_HW_PGTABLE_LEVEL_SHIFT(level) \ + ((PAGE_SHIFT - 3) * (level) + 3) + #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3)) /* * PMD_SHIFT determines the size a level 2 page table entry can map. */ #if CONFIG_PGTABLE_LEVELS > 2 -#define PMD_SHIFT ((PAGE_SHIFT - 3) * 2 + 3) +#define PMD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(2) #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) #define PTRS_PER_PMD PTRS_PER_PTE @@ -32,7 +40,7 @@ * PUD_SHIFT determines the size a level 1 page table entry can map. */ #if CONFIG_PGTABLE_LEVELS > 3 -#define PUD_SHIFT ((PAGE_SHIFT - 3) * 3 + 3) +#define PUD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(3) #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) #define PUD_MASK (~(PUD_SIZE-1)) #define PTRS_PER_PUD PTRS_PER_PTE @@ -42,7 +50,8 @@ * PGDIR_SHIFT determines the size a top-level page table entry can map * (depending on the configuration, this level can be 0, 1 or 2). */ -#define PGDIR_SHIFT ((PAGE_SHIFT - 3) * CONFIG_PGTABLE_LEVELS + 3) +#define PGDIR_SHIFT \ + ARM64_HW_PGTABLE_LEVEL_SHIFT(CONFIG_PGTABLE_LEVELS) #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) #define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT))