From patchwork Tue Sep 22 14:12:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 7239401 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BAF8C9F443 for ; Tue, 22 Sep 2015 14:19:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD01B207DF for ; Tue, 22 Sep 2015 14:19:44 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CCBE1207E8 for ; Tue, 22 Sep 2015 14:19:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZeONP-000073-C9; Tue, 22 Sep 2015 14:16:59 +0000 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZeONE-0008Lc-KF for linux-arm-kernel@lists.infradead.org; Tue, 22 Sep 2015 14:16:49 +0000 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id t8MEEWTS018018; Tue, 22 Sep 2015 07:16:14 -0700 Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 1x152hggrv-1 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 22 Sep 2015 07:16:14 -0700 Received: from SC-EXCH04.marvell.com (10.93.176.84) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Tue, 22 Sep 2015 07:16:12 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server id 15.0.1044.25 via Frontend Transport; Tue, 22 Sep 2015 07:16:12 -0700 Received: from xhacker.marvell.com (unknown [10.37.135.134]) by maili.marvell.com (Postfix) with ESMTP id CC0B63F7041; Tue, 22 Sep 2015 07:16:10 -0700 (PDT) From: Jisheng Zhang To: , , , , , , , Subject: [PATCH 1/5] clk: berlin: add common pll driver Date: Tue, 22 Sep 2015 22:12:32 +0800 Message-ID: <1442931156-5877-2-git-send-email-jszhang@marvell.com> X-Mailer: git-send-email 2.5.3 In-Reply-To: <1442931156-5877-1-git-send-email-jszhang@marvell.com> References: <1442931156-5877-1-git-send-email-jszhang@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2015-09-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=inbound_notspam policy=inbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310000 definitions=main-1509220208 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150922_071648_780220_AA78E2A5 X-CRM114-Status: GOOD ( 16.68 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jisheng Zhang , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add pll driver for Marvell SoCs newer than BG2, BG2CD, BG2Q. Signed-off-by: Jisheng Zhang --- drivers/clk/berlin/Makefile | 2 +- drivers/clk/berlin/pll.c | 119 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 120 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/berlin/pll.c diff --git a/drivers/clk/berlin/Makefile b/drivers/clk/berlin/Makefile index 2a36ab7..747700d 100644 --- a/drivers/clk/berlin/Makefile +++ b/drivers/clk/berlin/Makefile @@ -1,4 +1,4 @@ -obj-y += berlin2-avpll.o berlin2-pll.o berlin2-div.o +obj-y += pll.o berlin2-avpll.o berlin2-pll.o berlin2-div.o obj-$(CONFIG_MACH_BERLIN_BG2) += bg2.o obj-$(CONFIG_MACH_BERLIN_BG2CD) += bg2.o obj-$(CONFIG_MACH_BERLIN_BG2Q) += bg2q.o diff --git a/drivers/clk/berlin/pll.c b/drivers/clk/berlin/pll.c new file mode 100644 index 0000000..9aad0b6 --- /dev/null +++ b/drivers/clk/berlin/pll.c @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2015 Marvell Technology Group Ltd. + * + * Author: Jisheng Zhang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#include +#include +#include +#include +#include +#include + +#define PLL_CTRL0 0x0 +#define PLL_CTRL1 0x4 +#define PLL_CTRL2 0x8 +#define PLL_CTRL3 0xC +#define PLL_CTRL4 0x10 +#define PLL_STATUS 0x14 + +#define PLL_SOURCE_MAX 2 + +struct berlin_pll { + struct clk_hw hw; + void __iomem *ctrl; + void __iomem *bypass; + u8 bypass_shift; +}; + +#define to_berlin_pll(hw) container_of(hw, struct berlin_pll, hw) + +static u8 vcodiv_berlin[] = {1, 2, 4, 8, 16, 32, 64, 128}; + +static unsigned long berlin_pll_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + u32 val, fbdiv, rfdiv, vcodivsel, bypass; + struct berlin_pll *pll = to_berlin_pll(hw); + + bypass = readl_relaxed(pll->bypass); + if (bypass & (1 << pll->bypass_shift)) + return parent_rate; + + val = readl_relaxed(pll->ctrl + PLL_CTRL0); + fbdiv = (val >> 12) & 0x1FF; + rfdiv = (val >> 3) & 0x1FF; + val = readl_relaxed(pll->ctrl + PLL_CTRL1); + vcodivsel = (val >> 9) & 0x7; + return parent_rate * fbdiv * 4 / rfdiv / + vcodiv_berlin[vcodivsel]; +} + +static u8 berlin_pll_get_parent(struct clk_hw *hw) +{ + struct berlin_pll *pll = to_berlin_pll(hw); + u32 bypass = readl_relaxed(pll->bypass); + + if (bypass & (1 << pll->bypass_shift)) + return 1; + else + return 0; +} + +static const struct clk_ops berlin_pll_ops = { + .recalc_rate = berlin_pll_recalc_rate, + .get_parent = berlin_pll_get_parent, +}; + +void __init berlin_pll_setup(struct device_node *np) +{ + struct clk_init_data init; + struct berlin_pll *pll; + const char *parent_names[PLL_SOURCE_MAX]; + struct clk *clk; + int ret, num_parents; + + num_parents = of_clk_get_parent_count(np); + if (num_parents <= 0 || num_parents > PLL_SOURCE_MAX) + return; + + of_clk_parent_fill(np, parent_names, num_parents); + + pll = kzalloc(sizeof(*pll), GFP_KERNEL); + if (WARN_ON(!pll)) + return; + + pll->ctrl = of_iomap(np, 0); + pll->bypass = of_iomap(np, 1); + ret = of_property_read_u8(np, "bypass-shift", &pll->bypass_shift); + if (WARN_ON(!pll->ctrl || !pll->bypass || ret)) + return; + + init.name = np->name; + init.ops = &berlin_pll_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + + pll->hw.init = &init; + + clk = clk_register(NULL, &pll->hw); + if (WARN_ON(IS_ERR(clk))) + return; + + ret = of_clk_add_provider(np, of_clk_src_simple_get, clk); + if (WARN_ON(ret)) + return; +} +CLK_OF_DECLARE(berlin_pll, "marvell,berlin-pll", berlin_pll_setup);