From patchwork Mon Sep 28 21:56:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Alonso X-Patchwork-Id: 7281251 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BD76BBEEA4 for ; Mon, 28 Sep 2015 22:06:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C7F4120221 for ; Mon, 28 Sep 2015 22:06:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C955F20211 for ; Mon, 28 Sep 2015 22:06:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZggXA-000816-ER; Mon, 28 Sep 2015 22:04:32 +0000 Received: from mail-bl2on0103.outbound.protection.outlook.com ([65.55.169.103] helo=na01-bl2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZggS1-0004Qy-9v for linux-arm-kernel@lists.infradead.org; Mon, 28 Sep 2015 21:59:14 +0000 Received: from BN3PR0301CA0075.namprd03.prod.outlook.com (10.160.152.171) by CY1PR0301MB1228.namprd03.prod.outlook.com (10.161.212.150) with Microsoft SMTP Server (TLS) id 15.1.274.16; Mon, 28 Sep 2015 21:58:51 +0000 Received: from BL2FFO11FD026.protection.gbl (2a01:111:f400:7c09::141) by BN3PR0301CA0075.outlook.office365.com (2a01:111:e400:401e::43) with Microsoft SMTP Server (TLS) id 15.1.280.20 via Frontend Transport; Mon, 28 Sep 2015 21:58:50 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; freescale.mail.onmicrosoft.com; dmarc=none action=none header.from=freescale.com; Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD026.mail.protection.outlook.com (10.173.161.105) with Microsoft SMTP Server (TLS) id 15.1.274.4 via Frontend Transport; Mon, 28 Sep 2015 21:58:50 +0000 Received: from bluefly.am.freescale.net (bluefly.am.freescale.net [10.81.17.130]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id t8SLwUQ1032549; Mon, 28 Sep 2015 14:58:49 -0700 From: Adrian Alonso To: , , , , Subject: [PATCH v7 7/7] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings Date: Mon, 28 Sep 2015 16:56:41 -0500 Message-ID: <1443477401-17238-7-git-send-email-aalonso@freescale.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1443477401-17238-1-git-send-email-aalonso@freescale.com> References: <1443477401-17238-1-git-send-email-aalonso@freescale.com> X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1; BL2FFO11FD026; 1:WT8KBL+Gszlj4zyIaWQ4Io5TMo3BGMvnuY/jLrtBlwJPyZl1HuRer6w8EGPgsjBXO9XFkAllFHTB60yGOWvXnsCU0MdYhKhmPCZLofkKWHY9mP5ZCMA54EYnoGhkH+jd4hPvhN5U2BVapBfxC8KjrOWACpXPCyOK/FmNrhUzKrr5rW9POhS4ca498Mya8RJs0rSLzyziCws+OAgWjnF4qpj7XeGaKE26OwBewE8DsLDbpCcmLY3o9rOmzs6ZP+1lES2EQq3vxsES7Pkk/+kujX/TuCobPYdC8q0KeeYgevALji88r5PG3PvoTCmK/wibUWOilEO/T+/MEYHdws3xu1grfD9OZUDNYvAmQj4Rf6h6SAuitJCai2qenrIjOtzUGxNMErG/tmUpv3Pi0Zn18Q== X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(2980300002)(1109001)(1110001)(339900001)(189002)(199003)(50466002)(189998001)(5007970100001)(229853001)(11100500001)(47776003)(64706001)(105606002)(19580405001)(5003940100001)(19580395003)(107886002)(48376002)(106466001)(50226001)(2950100001)(6806005)(62966003)(5001860100001)(36756003)(87936001)(86362001)(5001960100002)(2201001)(5001830100001)(104016004)(92566002)(76176999)(50986999)(77156002)(97736004)(81156007)(4001540100001)(68736005)(5001770100001)(46102003)(77096005)(85426001)(33646002)(2101003)(4001430100001); DIR:OUT; SFP:1102; SCL:1; SRVR:CY1PR0301MB1228; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB1228; 2:HnJL91McJ+XsGmHX03C3vXjYoUrNkvaozzemDwrGqC6ZHWRYS8EB7JZiyeWAht9KaeSY86GzUH6eiNe/F38GtvTIV4Yboz4+85WA0J+OiATII+6s+YVVe3fKMfEMJdAYf+zj75HEoHoWMfVbD3K3OkgWeqKtUpiqUOjEOEuX+H4=; 3:o6DPH3twoZkztsuV31vxHQTrACyor58NE9SJhn65meqdMBfPXCInV3FbzztqzCLTu0RQta9kYipALdCXfmcIOhXg8KbSJHVkYp9rqzA7ti629NENTRjVO5dsjpc0EP69HzAMPs5NXHpFpgK70mST4YEmxcZdycm6JSTVzLMhptLcoklCJg1aMjvel4VXagZRiyykFeC41CdF7csR5eA9sWmJprdliP9zK1fmRsPz0bM=; 25:7+4zPnzasD7JphTlC90y2P1otJDiuNFQgK2NLvmXMC26Vhh723NT1nxKxai6cq9LPMLp+xhgAwaflSvTaM27Lj9wStaB7ZVjMnqb7d4ZA+c4EyzfBRYyfAMFJUfL0+betVivKM2D0ubSc4S6gMUgpQzKw8aaxvSyYwj8veck9fRDnXjjT1P4mXDqusOivrmcMvUa7Sa7aiWu8ht/lgJMv1D5gTN/4dhFOIBaCUpXubWDlKZJVWBuqOEcRazTMDfeVvnUC76+LHAmQszrgUyQlw== X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB1228; X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB1228; 20:/uWUx6K+DcpqkY9j42/g1Ai1qHVdNRdosUyZT+vtIET2oGeg0vNa3qB3CU4OnS2e5GT032AbLmgaS3u4SlXTFc8jv7OZ1jwW2311uNgCf3nuk6WHCEscls8s8qS5j03yKCOoB7to23Hv1KsO9T/lqRz59/wamimYUiCEQLdmBUcjHU/MeB9VTGJZp4NgP4MqVbkmG5zctY80SvebOrcMWgLh7SUxGpC/GWrx3AsIFbelJZROpHXPWH9HyZYv6lmor5UElX8E1Q5plHQ+1vEwaD9Pt7L8vHx8Uy+gdjeuCPWgYtLA+tqNyzVIWiCfb25MjLltJ67BLZjBzw54Dh58xvstaJUUsa5om9u7GCGF5Bk=; 4:rcAhdekR+6E3AJHUrpzrTKBhoilgnDVGSSaNpdgL8BRqPE21cWapCKT9WE+9gq+agm0Cyo0s23t+8BY86QOIvb0k61bBcDaLSNJIOPkO3dSiaznPzysLQLzMQrrM7JZc3VALUWqAiKEqLUP+iTQgydvOSsvCIKVcxNMmGTJxShJ5Ug2DQDH2dunomtrt7kUjoFiPkxhOob0pF25eWLHHB/icnwTdId1/zOhGt/8LgG/NXPFJG3zWScemDtfSsoRP9fI0mJrroa+YgGzhPf2zN9UxiCCesK3u0YJTYyjZRd60oJf35zD1eE0FeQ3NGSx3N0JcS2a+cTC7iSOT+3YV62MFvNGQeif6GhFVL1Q5J9o= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(5005006)(520078)(8121501046)(3002001); SRVR:CY1PR0301MB1228; BCL:0; PCL:0; RULEID:; SRVR:CY1PR0301MB1228; X-Forefront-PRVS: 0713BC207F X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY1PR0301MB1228; 23:aHy3+HtTflOBYk7c4Zm1kG+9vH0ZyGL9Wvkvci+?= =?us-ascii?Q?+2mn4wzMF2+EJRZLZuMnANWCMBchtvuE/jbwd/EuCCmyrcbhpWoQh0xsmb6E?= =?us-ascii?Q?vyEAfmrTbIg6y4kJmgxIAby2RIivPw0kV+DjvdRD+1jqx9qN+OxHTs/yuSnI?= =?us-ascii?Q?v6pb2W+bmC3niwOG51ASSBG8j4wJDOtHV1AFYdlXdnw8pXmVB+K2fLoE1TDE?= =?us-ascii?Q?ANz0qO82SlVVe24C7z0C3kQ3Z5idY0oY9kF0M1xxQW7pqwkU3Jr6bzKapx0N?= =?us-ascii?Q?diFmKrx2SRZqikCylpZz9GqVhwR87t3UdXUIweqppbJlSuCmnJa4I0x/7auk?= =?us-ascii?Q?UWxWPVNI/6gVJmT8fK23x+Dx1V0PbFSuyGnW9N2KJdjayqp5DUWxXsQGF7SH?= =?us-ascii?Q?4Z2l6wiBa9IqkaiU+wCoFOcpWeYVPhAabNFKyhgDK4He7lxKAj7JQQ7ANxSe?= =?us-ascii?Q?8Rgs4HQ14iIdvfSXqcVNSifHFeUk3vQRQjGm/NC8U3aAzYTDhrSnjYGEoJxV?= =?us-ascii?Q?ml5oV+fo7+TccuSxZJWrY5PO4JGCF/fEQB/Sk8BRrkdMMd9tkqQD8gk43KB5?= =?us-ascii?Q?z1J72Km2maIAjA4c8RuZyraAji3m2wJysH410aM9GTWaXP/VnMW6cXCODYW0?= =?us-ascii?Q?q4bUDsTWHfJgN4RI460GAALrPUDH9B4sZDkgFLmpqc03W+QWW95OFDAK1ylw?= =?us-ascii?Q?hjmbZKVNW/An7ei/kqGhp5Zt96FlMUjDKtnGlq0vxtxl/JtV23gVZfDxc/7k?= =?us-ascii?Q?RLmxxxmW6Mc3j5fnsuTweiH1W8mnNzAu8ESEfQyKLI2E9B3qoX+qdseMoqu8?= =?us-ascii?Q?QREeFWcC0eMtMZe71ludxsUBA6Zcct3bhEVAU4QxP8u+dqe+rloloFYe9bQt?= =?us-ascii?Q?jQG8N/CNZkblgKRZPR7HfRe7nln28uhl8ognoSNEG07M6eak0zQkds2pM2NU?= =?us-ascii?Q?F5hQZCaLm5bhPG9dquV3woCojRSscP/pTts64PMxYlFtA+WN63xEFfyK7zTN?= =?us-ascii?Q?iFbOiwcMe4I0x+OISLVy6wbPsDj3JdUuNWPQ/3GJG6AcZ7okI7Jq411tJPK+?= =?us-ascii?Q?5vHiJ5V3E1Jcaj0QI+vaaKonvl2TCRquxg+32qJSnN3y+ujYsagaESnyt2Mk?= =?us-ascii?Q?gsQ5EKfKzkll14DEaOjns98xVui+7aanRyNhm4ZIscCiXFbB2WvWESBjnBKG?= =?us-ascii?Q?oiiTHT3BIarhfKF7rOD9EPFKYx367AfJywZROe86ttFgdXlw+nqhcyD1ERLo?= =?us-ascii?Q?netxCRyjDqpzIhhOo7B1TvnCGY4oQ3+VsWRcARB4aH3bfaSi+bo9s1jMOKAT?= =?us-ascii?Q?BXg=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB1228; 5:9VapvcmpgFKHZ1fc7JrP+OiyX8cj1XUAd/KEY3ZnHsOU8cn0IPSyKjrrpm7rlTyUcdJSKa9BnUUTrI2PPyOXVsmgbIyB+1zRBVTNyjx5hxY84VYHsB37f1CjP/3mxNpn4hwzV+XRuznTAwkzcA3IUg==; 24:sOjhPSz3q4oWIRlcgRHtmq1Cu0rIQVV+MCd2RLtfne7FwmMMn7/C+b9Ndl9zm0gJWVtxjfwd718uCzPE9Grr5s/ZrCYZtqhPR0OMWGPDugA=; 20:z77oV91cONQtvnH2W2zBNzLRPO/e61hsNU1udvBno1GxH9p453m/dYlHR+LpalR/vc9MMH4tqhcgnKTxd+lgDw== X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2015 21:58:50.0108 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0301MB1228 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150928_145913_610984_0BDC9DD9 X-CRM114-Status: GOOD ( 20.94 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Frank.Li@freescale.com, nitin.garg@freescale.com, Anson.Huang@freescale.com, linux-gpio@vger.kernel.org, robh+dt@kernel.org, kernel@pengutronix.de, yibin.gong@freescale.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAD_ENC_HEADER,BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add iomuxc-lpsr devicetree bindings documentation Provide documentation context as well an example on pheriperals that could use pad from either iomuxc controller supported by iMX7D SoC Signed-off-by: Adrian Alonso --- Changes for V2: New patch on imx7d iomuxc-lpsr patch series Changes for V3: Add shared input select register notes Changes for V4: Resend Changes for V5: - Fix spell error - Remove references of SHARE_INPUT_SELECT_REG flag Changes for V6: Resend Changes for v7: Resend .../bindings/pinctrl/fsl,imx7d-pinctrl.txt | 63 +++++++++++++++++++++- 1 file changed, 62 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt index 8bbf25d..aae069f 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt @@ -1,16 +1,42 @@ * Freescale i.MX7 Dual IOMUX Controller +iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar +as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low +power state retention capabilities on gpios that are part of iomuxc-lpsr +(GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for +mux and pad control settings, it shares the input select register from main +iomuxc controller for daisy chain settings, the fsl,input-sel property extends +fsl,imx-pinctrl driver to support iomuxc-lpsr controller. + +iomuxc_lpsr: iomuxc-lpsr@302c0000 { + compatible = "fsl,imx7d-iomuxc-lpsr"; + reg = <0x302c0000 0x10000>; + fsl,input-sel = <&iomuxc>; +}; + +iomuxc: iomuxc@30330000 { + compatible = "fsl,imx7d-iomuxc"; + reg = <0x30330000 0x10000>; +}; + +Pheriparials using pads from iomuxc-lpsr support low state retention power +state, under LPSR mode GPIO's state of pads are retain. + Please refer to fsl,imx-pinctrl.txt in this directory for common binding part and usage. Required properties: -- compatible: "fsl,imx7d-iomuxc" +- compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or + "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller. - fsl,pins: each entry consists of 6 integers and represents the mux and config setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in imx7d-pinfunc.h under device tree source folder. The last integer CONFIG is the pad setting value like pull-up on this pin. Please refer to i.MX7 Dual Reference Manual for detailed CONFIG settings. +- fsl,input-sel: required property for iomuxc-lpsr controller, this property is + a phandle for main iomuxc controller which shares the input select register for + daisy chain settings. CONFIG bits definition: PAD_CTL_PUS_100K_DOWN (0 << 5) @@ -25,3 +51,38 @@ PAD_CTL_DSE_X1 (0 << 0) PAD_CTL_DSE_X2 (1 << 0) PAD_CTL_DSE_X3 (2 << 0) PAD_CTL_DSE_X4 (3 << 0) + +Examples: +While iomuxc-lpsr is intended to be used by dedicated peripherals to take +advantages of LPSR power mode, is also possible that an IP to use pads from +any of the iomux controllers. For example the I2C1 IP can use SCL pad from +iomuxc-lpsr controller and SDA pad from iomuxc controller as: + +i2c1: i2c@30a20000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>; + status = "okay"; +}; + +iomuxc-lpsr@302c0000 { + compatible = "fsl,imx7d-iomuxc-lpsr"; + reg = <0x302c0000 0x10000>; + fsl,input-sel = <&iomuxc>; + + pinctrl_i2c1_1: i2c1grp-1 { + fsl,pins = < + MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f + >; + }; +}; + +iomuxc@30330000 { + compatible = "fsl,imx7d-iomuxc"; + reg = <0x30330000 0x10000>; + + pinctrl_i2c1_2: i2c1grp-2 { + fsl,pins = < + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f + >; + }; +};