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[82.33.25.72]) by smtp.gmail.com with ESMTPSA id jt3sm18356370wjc.12.2015.10.12.01.22.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Oct 2015 01:22:03 -0700 (PDT) From: Daniel Thompson To: Matt Mackall , Herbert Xu Subject: [PATCH 1/3] dt-bindings: Document the STM32 HW RNG bindings Date: Mon, 12 Oct 2015 09:21:28 +0100 Message-Id: <1444638090-22886-2-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1444638090-22886-1-git-send-email-daniel.thompson@linaro.org> References: <1443904519-24012-1-git-send-email-daniel.thompson@linaro.org> <1444638090-22886-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151012_012226_746415_DD3C1418 X-CRM114-Status: GOOD ( 13.75 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Daniel Thompson , linaro-kernel@lists.linaro.org, Pawel Moll , patches@linaro.org, Ian Campbell , linux-kernel@vger.kernel.org, Rob Herring , linux-crypto@vger.kernel.org, Maxime Coquelin , Kumar Gala , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documentation of device tree bindings for the STM32 hardware random number generator. Signed-off-by: Daniel Thompson Acked-by: Maxime Coquelin Acked-by: Rob Herring --- .../devicetree/bindings/rng/st,stm32-rng.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/st,stm32-rng.txt diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt b/Documentation/devicetree/bindings/rng/st,stm32-rng.txt new file mode 100644 index 000000000000..47f04176f93b --- /dev/null +++ b/Documentation/devicetree/bindings/rng/st,stm32-rng.txt @@ -0,0 +1,21 @@ +STMicroelectronics STM32 HW RNG +=============================== + +The STM32 hardware random number generator is a simple fixed purpose IP and +is fully separated from other crypto functions. + +Required properties: + +- compatible : Should be "st,stm32-rng" +- reg : Should be register base and length as documented in the datasheet +- interrupts : The designated IRQ line for the RNG +- clocks : The clock needed to enable the RNG + +Example: + + rng: rng@50060800 { + compatible = "st,stm32-rng"; + reg = <0x50060800 0x400>; + interrupts = <80>; + clocks = <&rcc 0 38>; + };